Intel 31154 manual Pull-Up/Pull-Down Terminations Sheet 8 of, Signal, Comments

Models: 31154

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Pull-Up/Pull-Down Terminations (Sheet 8 of 9)

Terminations

 

 

 

Table 5.

Pull-Up/Pull-Down Terminations (Sheet 8 of 9)

 

 

 

 

Signal

 

Pull-Up/Pull-Down or Termination (See Note 1)

Comments

 

 

 

 

RSTV0

 

Tie to GND through a 0 external resistor.

 

 

 

 

RSRV1/CRSTEN

Tie to GND through a 0 external resistor.

 

 

 

 

 

 

 

S_M66EN is meaningful only when S_PCIXCAP is

 

 

 

connected to GND (that is, when the secondary

 

 

 

PCI bus is in legacy PCI mode).

 

 

 

For designs without secondary PCI slot:

 

 

 

• When the secondary PCI devices (and

 

 

 

loading) support 66 MHz PCI bus, pull up to

 

 

 

3.3 V through an 8.2 Kseries resistor.

 

S_M66EN

 

• When the secondary PCI devices (and

Refer to PCI-X Addendum to the PCI Local Bus

 

loading) do not supports 66 MHz PCI bus,

Specification, Revision 1.0b, Table 6-1.

 

 

 

 

GND this pin.

 

 

 

For designs with secondary PCI slot:

 

 

 

• When the on-board PCI device does not

 

 

 

support 66 MHz PCI bus, GND this pin.

 

 

 

• When the on-board PCI device does support

 

 

 

66 MHz PCI bus, connect this pin to M66EN

 

 

 

(pin 49B) of the PCI connector.

 

 

 

 

 

 

 

For designs without secondary PCI slot:

 

 

 

• When there is at least one legacy PCI device

 

 

 

on the secondary PCI bus, tie this pin directly

 

 

 

to GND.

 

 

 

• When there is at least one PCI-X device that

 

 

 

supports maximum PCI-X of only 66 MHz on

 

 

 

the secondary PCI bus, pull down to GND

 

 

 

through a 10 Kseries resistor.

 

 

 

• When all secondary PCI-X devices (and the

 

S_PCIXCAP

 

bus loading) support PCI-X 133 MHz, leave

Refer to PCI-X Addendum to the PCI Local Bus

 

this pin unconnected (except for decoupling

Specification, Revision 1.0b, Table 6-1.

 

 

 

 

capacitor).

 

 

 

For designs with secondary PCI slot:

 

 

 

• When there is at least one on-board legacy

 

 

 

PCI device on the secondary PCI bus, tie this

 

 

 

pin directly to GND.

 

 

 

• Otherwise, connect this pin to PCIXCAP

 

 

 

(pin B38) of the PCI connector (assuming that

 

 

 

the bus loading supports up to PCI-X

 

 

 

133 MHz)

 

 

 

 

 

NOTES:

1.The recommended value for pull-up resistors for PCI applications is 5.6 K(note that the minimum value for PCI 3.3 V signaling RMIN = 2.42 K, RTYP = 8.2 K, as per the PCI Local Bus Specification, Revision 2.3, section 4.3.3).

2.The recommended value for pull-up resistors for PCI-X applications is 8.2 K. For PCI-X, the minimum pull-up resistor value is 5 K, as per the PCI-X Addendum to the PCI Local Bus Specification, Revision 1.0b, section 9.7.

3.For plug-in card implementations, the pull-up must be on the motherboard.

4.Connect PVIO and SVIO pull-up resistors to 5 V or 3.3 V power supply through an external resistor—25 (5 V) or

0 (3.3 V), depending on the signaling level of the primary/secondary PCI bus. Refer to the power-sequencing guidelines in Section 8.2 on page 58.

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Intel® 31154 133 MHz PCI Bridge Design Guide Design Guide

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Intel manual Pull-Up/Pull-Down Terminations Sheet 8 of, Intel 31154 133 MHz PCI Bridge Design Guide Design Guide, Signal