Interrupt Service Procedures
K
A
DAK
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The task trap handler can be written as a Large or Medium model C function with formal
parameters.
#include "amx831sd.h" /* AMX Structure Definitions*/
void cdecl tdiverr(
struct amxregs regs, /* Register structure */
void FAR *faultp) /* Fault pointer */
{:
Process the error
:
}
Since the task trap handler executes in the context of the task, the task's stack must
account for the stack used by the handler. An additional sizeof(struct amxregs)
bytes of stack is required to accommodate the processor dependent stack frame generated
by AMX prior to its call to the trap handler.
AMX provides the address of the fault and the state of each processor register at the time
of the fault.
The error exception is serviced by AMX. The address of the fault is on the stack as
parameter faultp. For the overflow trap, the address points to the instruction following
the INTO instruction. For the 8086/88 and 80186/188 DIV, IDIV or BOUND instruction, the
address points to the instruction following the instruction which caused the fault. For the
80286 and 80386 DIV, IDIV or BOUND instruction, the address points to the instruction
(including any instruction prefixes) which caused the fault. The state of each register at
the time of the fault is present on the stack in an AMX register structure regs (see
definition in Appendix D.1).
The register values in structure regs can be examined and modified with care. If
necessary, the FAR pointer faultp can be modified, with care, to force resumption at
some other location in the task code. If the trap handler returns to AMX, execution will
resume at the location specified by faultp with registers set according to the values in
structure regs.
Since the trap handler executes in the context of the task in which the error trap occurred,
it is free to use all AMX services normally available to tasks. In particular, the trap
handler can call ajend to end task execution if so desired.
Note
Task trap handlers are NOT Interrupt Handlers even though
the error interrupt is detected via a processor exception.