Analog Devices ADSP-TS201S specifications Test Conditions, Output Disable Time

ADSP-TS201S

STRENGTH 5

	88
	77	IOL
	66
	55
)	44
(mA						VDD_IO = 2.63V, –40°C
	33
T	22			VDD_IO = 2.5V, +25°C
EN
	11					VDD_IO = 2.63V, –40°C
URR
	0	VDD_IO = 2.38V, +105°C
INC	–11			VDD_IO = 2.5V, +25°C
P	–22
UT
	–33	VDD_IO = 2.38V, +105°C
UTP	–44
O	–55
	–66						IOH
	–77
	–88
	0	0.4	0.8	1.2	1.6	2.0	2.4	2.8
			OUTPUT PIN VOLTAGE (V)

Figure 31. Typical Drive Currents at Strength 5

STRENGTH 6

	100
	90	IOL
	80
	70
)	60
	50
(mA						VDD_IO = 2.63V, –40°C
	40
T	30			VDD_IO = 2.5V, +25°C
REN
	20	VDD_IO = 2.38V, +105°C				VDD_IO = 2.63V, –40°C
	10
UR
	0
C
N	–10
PI	–20			VDD_IO = 2.5V, +25°C
T
	–30
TPU		VDD_IO = 2.38V, +105°C
	–40
OU	–50
	–60
	–70						IOH
	–80
	–90
	–100
	0	0.4	0.8	1.2	1.6	2.0	2.4	2.8
			OUTPUT PIN VOLTAGE (V)

Figure 32. Typical Drive Currents at Strength 6

STRENGTH 7

	110
	100	IOL
	90
	80
	70
(mA)	60					VDD_IO = 2.63V, –40°C
	50
	40
RENT				VDD_IO = 2.5V, +25°C
	30
	20				VDD_IO = 2.63V, –40°C
CUR	10	VDD_IO = 2.38V, +105°C
	0
PIN	–10			VDD_IO = 2.5V, +25°C
	–20
UT	–30
UTP	–40	VDD_IO = 2.38V, +105°C
	–50
O	–60
	–70						IOH
	–80
	–90
	–100
	–110
	0	0.4	0.8	1.2	1.6	2.0	2.4	2.8

OUTPUT PIN VOLTAGE (V)

Figure 33. Typical Drive Currents at Strength 7

TEST CONDITIONS

The ac signal specifications (timing parameters) appear in Table 29 on Page 28. These include output disable time, output enable time, and capacitive loading. The timing specifications for the DSP apply for the voltage reference levels in Figure 34.

INPUT
OR	1.25V	1.25V

OUTPUT

Figure 34. Voltage Reference Levels for AC Measurements (Except Output Enable/Disable)

Output Disable Time

Output pins are considered to be disabled when they stop driv- ing, go into a high impedance state, and start to decay from their output high or low voltage. The time for the voltage on the bus to decay by ΔV is dependent on the capacitive load, CL and the load current, IL. This decay time can be approximated by the fol- lowing equation:

tDECAY = (CLΔV) ⁄ IL

The output disable time tDIS is the difference between

tMEASURED_DIS and tDECAY as shown in Figure 35. The time

tMEASURED_DIS is the interval from when the reference signal switches to when the output voltage decays ΔV from the mea-

sured output high or output low voltage. tDECAY is calculated with test loads CL and IL, and with ΔV equal to 0.4 V.

REFERENCE

SIGNAL

tMEASURED_DIS tMEASURED_ENA

tDIS		tENA
VOH (MEASURED)
	VOH (MEASURED) – ￿V		1.65V
VOL (MEASURED)	VOL (MEASURED) + ￿V		0.85V
	tDECAY	tRAMP

OUTPUT STOPS	OUTPUT STARTS
DRIVING	DRIVING

HIGH IMPEDANCE STATE.

TEST CONDITIONS CAUSE THIS

VOLTAGE TO BE APPROXIMATELY 1.25V.

Figure 35. Output Enable/Disable

Rev. C Page 37 of 48 December 2006