Dialogic 6.2 Figure 41. FXO Loop Start Outgoing Clear Timing Diagram, Revised , RECEIVED BITS, , TRANSMITTED

Loop Start Signaling
November 2009 307
Figure 41. FXO Loop Start – Outgoing Clear Timing Diagram
IISDN SMI MESSAGES: L4L3mCLEAR_REQUEST
L3L4mCLEAR_REQUEST
IISDN TIMERS:
hooktimer_onhook_rls hooktimer_offhook_inseize guard_interval_timer ign_insz_post_rls_timer hooktimer_onhook_rls RECEIVE HOOKSWITCH, FXS:
A
Bi
t
B Bit TRANSMIT HOOKSWITCH, FXO:
A
Bi
t
B Bit NOTE: This diagram is designed to give the reader a general understanding of the sequence of events for this robbed bit protocol over time. The timers and spacing on this graph are not proportional to the actual events that occur.
Revised 10-Nov-98
Revision 1.3
TRANSMITTED
RECEIVED BITS,
Revised