November 2009

313

Figure 45. FXS Loop Start – Outgoing Clear Timing Diagram

IISDN SMI MESSAGES:

L4L3mCLEAR_REQUEST

 

L3L4mCLEAR_REQUEST

IISDN TIMERS:

 

guard_interval_timer

 

RECEIVED BITS,

 

A Bit

 

B Bit

TRANSMITTED

A Bit

B Bit

NOTE: This diagram is designed to give the reader a general understanding of the sequence of events for this robbed bit protocol over time. The timers and spacing on this graph are not proportional to the actual events that occur.

NOTE: For FXS Loop Start Mode, there is no manner using the signalling bits in which to detect that the remote side has hung

up. The only way to do this is to detect a lack of data on the connection, and then initate call teardown from the local side.

Revised 10-Nov-98

Revision 1.3

Loop Start Signaling

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Image 313
Dialogic 6.2 manual FXS Loop Start Outgoing Clear Timing Diagram, November 313