November 2009

311

Figure 43. FXS Loop Start – Incoming Call Timing Diagram

IISDN SMI MESSAGES:

L4L3mALERTING_REQUEST or L4L3mPROGRESS_REQUEST

L4L3mCONNECT_REQUEST

 

L3L4mPRE_SEIZE

L3L4mSETUP_IND

 

IISDN TIMERS:

 

 

 

hooktimer_onhook_rls

 

 

 

modified_in_rls_timer

 

 

 

hooktimer_onhk_mod_in_rls

 

 

 

first_indigit_timer

 

 

 

dptimer_immed_delay

 

 

 

RECEIVED BITS,

 

 

 

A Bit

 

 

 

B Bit

 

 

 

TRANSMITTED

 

NOTE: No digits are collected on the near end in this mode.

A Bit

 

 

 

B Bit

 

 

 

NOTE: This diagram is designed to give the reader a general understanding of the sequence of events for this robbed

bit protocol over time. The timers and spacing on this graph are not proportional to the actual events that occur.

Revised 10-Nov-98

Revision 1.3

Loop Start Signaling

Page 311
Image 311
Dialogic 6.2 manual FXS Loop Start Incoming Call Timing Diagram, November 311