
CEC 1 | CEC 2 |
CPU 1 CPU 2
CPU 3
CPU 4
400 MHz | 3.2 GBps | |
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32 MB |
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L4 cache | 3.2 GBps | cache controller |
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SMP Expansion Ports (3.2GBps)
CPU 4 |
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Processor & |
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cache controller | 3.2 GBps | L4 cache | |||||||||
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| SDRAM |
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| SDRAM |
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RXE
Expansion
Port B
(1 GBps)
3.2 GBps
Memory controller
2 GBps
3.2GBps
3.2 GBps
100 MHz
SDRAM
SDRAM
SDRAM
SDRAM
RXE Expansion |
| PCI bridge | 66 MHz |
Port A (1 GBps) |
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Bus A
PCI bridge
66 MHz
Ultra160
SCSI
Gigabit
Ethernet
33MHz
Video
USB
Kbd/Ms
RSA
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IBM
66 MHz | 100 MHz | 133 MHz |
Figure 1-5 xSeries 440 system block diagram — two SMP Expansion Modules
When two SMP Expansion Modules are installed, they are connected together using two 3.2 GBps SMP Expansion Ports. The third scalability port is not used in this
The two PCI bridges in the
133MHz devices using four
The PCI bridge also has a 1 GBps