Contents—Processor
Revision History..................................................................................................................
8
1.0 Introduction.................................................................................................................
9
1.1
Supported Technologies.........................................................................................
10
1.2
Interfaces............................................................................................................
11
1.3
Power Management Support...................................................................................
1.4
Thermal Management Support................................................................................
12
1.5
Package Support...................................................................................................
1.6
Terminology.........................................................................................................
1.7
Related Documents...............................................................................................
15
2.0 Interfaces...................................................................................................................
17
2.1
System Memory Interface......................................................................................
2.1.1 System Memory Technology Supported.......................................................
18
2.1.2 System Memory Timing Support.................................................................
19
2.1.3 System Memory Organization Modes...........................................................
2.1.3.1 System Memory Frequency............................................................
21
2.1.3.2
Intel® Fast Memory Access (Intel® FMA) Technology Enhancements...
2.1.3.3
Data Scrambling..........................................................................
2.2
PCI Express* Interface..........................................................................................
22
2.2.1 PCI Express* Support................................................................................
2.2.2 PCI Express* Architecture..........................................................................
23
2.2.3 PCI Express* Configuration Mechanism........................................................
2.3
Direct Media Interface (DMI)..................................................................................
25
2.4
Processor Graphics................................................................................................
27
2.5
Processor Graphics Controller (GT)..........................................................................
2.5.1 3D and Video Engines for Graphics Processing..............................................
28
2.5.2 Multi Graphics Controllers Multi-Monitor Support...........................................
30
2.6
Digital Display Interface (DDI)................................................................................
2.7
Intel® Flexible Display Interface (Intel® FDI)............................................................
36
2.8
Platform Environmental Control Interface (PECI).......................................................
2.8.1 PECI Bus Architecture................................................................................
3.0 Technologies...............................................................................................................
38
3.1
Intel® Virtualization Technology (Intel® VT).............................................................
3.2
Intel® Trusted Execution Technology (Intel® TXT).....................................................
42
3.3
Intel® Hyper-Threading Technology (Intel® HT Technology).......................................
43
3.4
Intel® Turbo Boost Technology...............................................................................
44
3.5
Intel® Advanced Vector Extensions 2.0 (Intel® AVX2)................................................
3.6
Intel® Advanced Encryption Standard New Instructions (Intel® AES-NI).......................
45
3.7
Intel® Transactional Synchronization Extensions (Intel® TSX)....................................
3.8
Intel® 64 Architecture x2APIC................................................................................
46
3.9
Power Aware Interrupt Routing (PAIR)....................................................................
47
3.10 Execute Disable Bit..............................................................................................
3.11 Supervisor Mode Execution Protection (SMEP)........................................................
4.0 Power Management....................................................................................................
48
4.1
Advanced Configuration and Power Interface (ACPI) States Supported.........................
49
Intel® Xeon® Processor E3-1200 v3 Product Family
June 2013
Datasheet – Volume 1 of 2
Order No.: 328907-001
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