Processor—Signal Description

6.10Power Sequencing

Table 33.

Power Sequencing

 

 

 

 

 

 

 

Signal Name

Description

Direction / Buffer

 

 

 

Type

 

 

 

 

 

SM_DRAMPWROK

SM_DRAMPWROK Processor Input: This signal

I

 

connects to the PCH DRAMPWROK.

Asynchronous CMOS

 

 

 

 

 

 

 

 

The processor requires this input signal to be a clean

 

 

 

indication that the VCC and VDDQ power supplies are

 

 

 

stable and within specifications. This requirement

 

 

 

applies regardless of the S-state of the processor.

I

 

PWRGOOD

'Clean' implies that the signal will remain low (capable

 

Asynchronous CMOS

 

 

of sinking leakage current), without glitches, from the

 

 

 

 

 

time that the power supplies are turned on until they

 

 

 

come within specification. The signal must then

 

 

 

transition monotonically to a high state.

 

 

 

 

 

 

 

SKTOCC# (Socket Occupied)/PROC_DETECT#:

 

 

 

(Processor Detect): This signal is pulled down

 

 

SKTOCC#

directly (0 Ohms) on the processor package to the

—

 

ground. There is no connection to the processor silicon

 

 

 

 

 

for this signal. System board designers may use this

 

 

 

signal to determine if the processor is present.

 

 

 

 

 

6.11Processor Power Signals

Table 34.

Processor Power Signals

 

 

 

 

 

 

Signal Name

Description

Direction / Buffer

 

 

 

Type

 

 

 

 

 

VCC

Processor core power rail.

Ref

 

 

 

 

 

VCCIO_OUT

Processor power reference for I/O.

Ref

 

 

 

 

 

VDDQ

Processor I/O supply voltage for DDR3.

Ref

 

 

 

 

 

VCOMP_OUT

Processor power reference for PEG/Display RCOMP.

Ref

 

 

 

 

 

VIDSOUT

VIDALERT#, VIDSCLK, and VIDSCLK comprise a three

Input GTL/ Output Open

 

signal serial synchronous interface used to transfer

Drain

 

VIDSCLK

 

power management information between the

Output Open Drain

 

VIDALERT#

processor and the voltage regulator controllers.

Input CMOS

 

 

 

 

 

 

 

6.12Sense Pins

Table 35.

Sense Pins

 

 

 

 

 

 

 

Signal Name

Description

Direction /

 

 

 

Buffer Type

 

 

 

 

 

VCC_SENSE

VCC_SENSE and VSS_SENSE provide an isolated, low-

O

 

impedance connection to the processor input VCC voltage

 

VSS_SENSE

and ground. They can be used to sense or measure

A

 

 

voltage near the silicon.

 

 

 

 

 

Intel® Xeon® Processor E3-1200 v3 Product Family

 

Datasheet – Volume 1 of 2

June 2013

84

Order No.: 328907-001