Technologies—Processor

•More reliable: Due to the hardware support, VMMs can now be smaller, less complex, and more efficient. This improves reliability and availability and reduces the potential for software conflicts.

•More secure: The use of hardware transitions in the VMM strengthens the isolation of VMs and further prevents corruption of one VM from affecting others on the same system.

Intel® VT-x Features

The processor supports the following added new Intel VT-x features:

•Extended Page Table (EPT) Accessed and Dirty Bits

—EPT A/D bits enabled VMMs to efficiently implement memory management and page classification algorithms to optimize VM memory operations, such as de- fragmentation, paging, live migration, and check-pointing. Without hardware support for EPT A/D bits, VMMs may need to emulate A/D bits by marking EPT paging-structures as not-present or read-only, and incur the overhead of EPT page-fault VM exits and associated software processing.

•Extended Page Table Pointer (EPTP) switching

—EPTP switching is a specific VM function. EPTP switching allows guest software (in VMX non-root operation, supported by EPT) to request a different EPT paging-structure hierarchy. This is a feature by which software in VMX non- root operation can request a change of EPTP without a VM exit. Software will be able to choose among a set of potential EPTP values determined in advance by software in VMX root operation.

•Pause loop exiting

—Support VMM schedulers seeking to determine when a virtual processor of a multiprocessor virtual machine is not performing useful work. This situation may occur when not all virtual processors of the virtual machine are currently scheduled and when the virtual processor in question is in a loop involving the PAUSE instruction. The new feature allows detection of such loops and is thus called PAUSE-loop exiting.

The processor core supports the following Intel VT-x features:

•Extended Page Tables (EPT)

—EPT is hardware assisted page table virtualization

—It eliminates VM exits from guest OS to the VMM for shadow page-table maintenance

•Virtual Processor IDs (VPID)

—Ability to assign a VM ID to tag processor core hardware structures (such as TLBs)

—This avoids flushes on VM transitions to give a lower-cost VM transition time and an overall reduction in virtualization overhead.

•Guest Preemption Timer

—Mechanism for a VMM to preempt the execution of a guest OS after an amount of time specified by the VMM. The VMM sets a timer value before entering a guest

—The feature aids VMM developers in flexibility and Quality of Service (QoS) guarantees

 

Intel® Xeon® Processor E3-1200 v3 Product Family

June 2013

Datasheet – Volume 1 of 2

Order No.: 328907-001

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