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Table 13. | Direct Media Interface (DMI) States |
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| State |
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| Description |
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| L0 |
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| Full on – Active transfer state. |
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| L0s |
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| First Active Power Management low power state – Low exit latency. |
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| L1 |
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| Lowest Active Power Management – Longer exit latency. |
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| L3 |
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| Lowest power state |
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Table 14. | G, S, and C Interface State Combinations |
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| Global |
| Sleep (S) |
| Processor |
| Processor |
| System Clocks |
| Description | ||||
| (G) |
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| State |
| Package (C) |
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| State |
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| State |
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| State |
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| G0 |
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| S0 |
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| C0 |
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| Full On |
| On |
| Full On |
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| G0 |
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| S0 |
| C1/C1E |
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| On |
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| G0 |
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| S0 |
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| C3 |
| Deep Sleep |
| On |
| Deep Sleep | |
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| G0 |
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| S0 |
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| C6/C7 |
| Deep Power- |
| On |
| Deep | |
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| down |
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| G1 |
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| S3 |
| Power off |
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| Off, except RTC |
| Suspend to RAM | |
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| G1 |
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| S4 |
| Power off |
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| Off, except RTC |
| Suspend to Disk | |
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| G2 |
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| S5 |
| Power off |
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| Off, except RTC |
| Soft Off | |
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| G3 |
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| NA |
| Power off |
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| Power off |
| Hard off | |
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Table 15. | D, S, and C Interface State Combination |
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| Graphics |
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| Sleep (S) |
| Package (C) |
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| Description |
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| Adapter (D) |
| State |
| State |
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| State |
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| D0 |
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| S0 |
| C0 |
| Full On, Displaying. |
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| D0 |
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| S0 |
| C1/C1E |
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| D0 |
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| S0 |
| C3 |
| Deep sleep, Displaying. |
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| D0 |
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| S0 |
| C6/C7 |
| Deep |
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| D3 |
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| S0 |
| Any |
| Not displaying. |
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| D3 |
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| S3 |
| N/A |
| Not displaying, Graphics Core is powered off. | |||||||
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| D3 |
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| S4 |
| N/A |
| Not displaying, suspend to disk. |
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4.2Processor Core Power Management
While executing code, Enhanced Intel SpeedStep® Technology optimizes the processor’s frequency and core voltage based on workload. Each frequency and voltage operating point is defined by ACPI as a
4.2.1Enhanced Intel® SpeedStep® Technology Key Features
The following are the key features of Enhanced Intel SpeedStep Technology:
Intel® Xeon® Processor |
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Datasheet – Volume 1 of 2 | June 2013 |
50 | Order No.: |