Intel IXF1104 - page 21

Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller

21 Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005

2.0 General Description

The IXF1104 MAC provides up to a 4.0 Gbps interface to four individual 10/100/100 0Mbps full-

duplex or 10/100Mbps half-duplex-capable Ethernet Media Access Controllers (MACs). The

network processor is supported through a System Packet Interface Phase 3 (SPI3) media interface.

The following PHY interfaces are selected on a per-port basis:

•Serializer/Deserializer (SerDes) with Optical Module Interface sup port

•Gigabit Media Independent Interface (GMII)

•Reduced Gigabit Media Independent Interface (RGMII).

Figure 1 illustrates the IXF1104 MAC block diagram.

Figure 1. Block Diag ram

Forwarding Engine/Networ k Processor

CPU

Intel

IXF1104 MAC

SerDes/R GMI I/GMII Inte rfa c e

MDIO

SPI3

uP IF

PHY 1 Device

PHY 2 Device

PHY 3 Device

PHY 4 Device

B3175-0