Intel IXF1104 - page 221

Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller
221 Datasheet
Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
Table 152. Clock and Interface Mode Change Enable Ports 0 - 3 ($0x794)
Bit Name Description Type1Default
Register Description: This register is used when a change to the operational mode or speed
of the IXF1104 MAC is requir ed. This register en sures that when a chang e is made that the
internal clocking of t he IXF1104 MAC is managed c orrectly and no unexp ected effects of the
operational or speed change a re observable on the line interfaces.
0x00000000
31:4 Reserved Reserved RO 0x0000000
3Clock and Interface Mode Change Enable
Port 32
Enables internal clock generator for Port 3 to
sample the “MAC IF Mode and RGMII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
0 = Set to zero when changes are being made to
the “MAC IF Mode and RG MII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
1 = Set to 1 for the co nfiguration changes t o take
effect.
R/W 0
2Clock and Interface Mode Change Enable
Port 22
Enables internal clock generator for Port 2 to
sample the “MAC IF Mode and RGMII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
0 = Set to zero when changes are being made to
the “MAC IF Mode and RG MII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
1 = Set to 1 for the co nfiguration changes t o take
effect.
R/W 0
1 Clock and Interface Mode Change Enable
Port 12
Enables internal clock generator for Port 1 to
sample the “MAC IF Mode and RGMII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
0 = Set to zero when changes are being made to
the “MAC IF Mode and RG MII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
1 = Set to 1 for the co nfiguration changes t o take
effect.
R/W 0
0 Clock and Interface Mode Change Enable
Port 02
Enables internal clock generator for Port 0 to
sample the “MAC IF Mode and RGMII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
0 = Set to zero when changes are being made to
the “MAC IF Mode and RG MII Speed ($
Port_Index + 0x10)" and the “Interface Mode
($0x501)".
1 = Set to 1 for the co nfiguration changes t o take
effect.
R/W 0
1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No
clear; R/W/C = Read/Write, Clear on Write
2. Refer to Section 6.1, “Change Port Mode Initial ization Sequence” on page130 for the proper sequence to
change the port mode and speed in conjunct ion with this register.