Intel IXF1104 SPI3 Interface Signal Descriptions Sheet 5, Polled-PHY Transmit Packet Available

Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 3. SPI3 Interface Signal Descriptions (Sheet 5 of 8)

Signal Name		Ball	Type	Standard	Description
MPHY	SPHY	Designator
					Polled-PHY Transmit Packet Available.
					PTPA allows the polling of the port selected
					by the TADR address bus.
					When High, PTPA indicates that the amount
					of data in the TX FIFO is below the TX FIFO
					High watermark. When the High watermark
					is crossed, PTPA transitions Low to indicate
					that the TX FIFO is almost full. It stays Low
					until the amount data in the TX FIFO goes
					back below the TX FIFO Low watermark. At
					this point, PTPA transitions High to indicate
					that the programmed number of bytes are
PTPA	PTPA	B11	Output	3.3 V	now available for data transfers.
				LVTTL	NOTE: For more information, see
					Table 132 “TX FIFO High
					Watermark Ports 0 - 3 ($0x600 –
					0x603)” on page 203 and Table 133
					“TX FIFO Low Watermark Register
					Ports 0 - 3 ($0x60A – 0x60D)” on
					page 204.
					The port reported by PTPA is updated on
					the following rising edge of TFCLK after the
					port address on TADR is sampled by the
					PHY device.
					PTPA is updated on the rising edge of
					TFCLK.
RDAT31	RDAT7_3	F24			Receive Data Bus.
RDAT30	RDAT6_3	G24			RDAT carries payload data and in-band
RDAT29	RDAT5_3	G23
					addresses from the IXF1104 MAC.
RDAT28	RDAT4_3	G22		3.3 V
			Output
RDAT27	RDAT3_3	G21		LVTTL	Mode	Bits
RDAT26	RDAT2_3	G20			32-bit Multi-PHY	[31:24]
RDAT25	RDAT1_3	G19
					4 x 8 Single-PHY	[7:0] for port 3
RDAT24	RDAT0_3	G18
RDAT23	RDAT7_2	E21			Receive Data Bus.
RDAT22	RDAT6_2	E22			RDAT carries payload data and in-band
RDAT21	RDAT5_2	D22
					addresses from the IXF1104 MAC.
RDAT20	RDAT4_2	C22		3.3 V
			Output
RDAT19	RDAT3_2	C21		LVTTL	Mode	Bits
RDAT18	RDAT2_2	C20			32-bit Multi-PHY	[23:16]
RDAT17	RDAT1_2	B22
					4 x 8 Single-PHY	[7:0] for port 2
RDAT16	RDAT0_2	B20
RDAT15	RDAT7_1	F18			Receive Data Bus.
RDAT14	RDAT6_1	E18			RDAT carries payload data and in-band
RDAT13	RDAT5_1	E17
					addresses from the IXF1104 MAC.
RDAT12	RDAT4_1	F16		3.3 V
			Output
RDAT11	RDAT3_1	E16		LVTTL	Mode	Bits
RDAT10	RDAT2_1	D16			32-bit Multi-PHY	[15:8]
RDAT9	RDAT1_1	C17
					4 x 8 Single-PHY	[7:0] for port 1
RDAT8	RDAT0_1	A17

43 Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005