Intel IXF1104 2 SPI3 MPHY/SPHY Ball Connections, Line Side Interface Multiplexed Balls Sheet 2

Models: IXF1104

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Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 16. Line Side Interface Multiplexed Balls (Sheet 2 of 2)

Copper Mode

Fiber Mode

 

 

 

 

 

 

 

 

Unused Port

 

Ball Designator

 

GMII Signal

RGMII Signal

Optical Module/

 

 

 

 

 

 

 

SerDes Signal

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

NC

NC

TX_FAULT_INT2

NC

P23

 

 

 

NC

NC

RX_LOS_INT2

NC

P19

 

 

 

NC

NC

MOD_DEF_INT2

NC

N22

 

 

 

MDC

MDC

NC

NC

W24

 

 

 

 

 

 

 

 

 

 

 

MDIO2

MDIO2

NC

NC

V21

 

 

 

NC

NC

I2C_CLK

NC

L23

 

 

 

NC

NC

I2C_DATA_0:32

NC

L24

M24

N24

P24

1.An external pull-up resistor is required with most optical modules.

2.An open drain I/O, external 4.7 k Ω pull-up resistor is required.

4.5.2SPI3 MPHY/SPHY Ball Connections

Table 17 lists the balls used for the SPI3 Interface and provides a guide to connect these balls in MPHY and SPHY mode.

Table 17. SPI3 MPHY/SPHY Interface (Sheet 1 of 3)

SPI3 Signals

 

 

 

 

 

 

 

 

Ball Number

 

Comments

MPHY

SPHY

 

 

 

 

 

 

 

 

 

 

 

 

TDAT[31:24]

TDAT[7:0]_3

F7

F5

G9

G8

 

G7

G6

G5

G4

 

 

 

 

 

 

 

 

 

 

 

TDAT[23:16]

TDAT[7:0]_2

C8

F9

E10

E9

MPHY: Consists of a single 32-bit data

E8

E7

E6

E5

bus

 

 

 

 

 

 

 

 

SPHY: Separate 8-bit data bus for each

TDAT[15:8]

TDAT[7:0]_1

H3

J3

J2

J1

H1

G2

G1

F1

Ethernet port

 

 

 

 

 

 

 

 

 

TDAT[7:0]

TDAT[7:0]_0

C6

B5

C5

C4

 

D1

C3

C2

B3

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

 

To achieve maximum bandwidth, set

TFCLK

TFCLK

D7

 

 

 

TFCLK as follows:

 

 

 

MPHY: 133 MHz

 

 

 

 

 

 

 

 

 

 

 

 

SPHY: 125 MHz.

 

 

 

 

 

 

 

TPRTY_0

TPRTY_0

D5

 

 

 

MPHY: Use TPRTY_0 as the TPRTY

 

 

 

 

 

 

GND

TPRTY_1

G3

 

 

 

 

 

 

signal.

 

 

 

 

 

 

SPHY: Each port has its own dedicated

GND

TPRTY_2

B9

 

 

 

 

 

 

 

 

 

TPRTY_n signal.

GND

TPRTY_3

J6

 

 

 

 

 

 

 

 

 

 

 

 

 

 

TENB_0

TENB_0

B7

 

 

 

MPHY: Use TENB_0 as the TENB

 

 

 

 

 

 

VDD2

TENB_1

E2

 

 

 

 

 

 

signal.

 

 

 

 

 

 

SPHY: Each port has its own dedicated

VDD2

TENB_2

C9

 

 

 

 

 

 

 

 

 

TENB_n signal.

VDD2

TENB_3

J4

 

 

 

 

 

 

 

 

 

 

 

 

 

 

59

Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005

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Intel IXF1104 manual 2 SPI3 MPHY/SPHY Ball Connections, Line Side Interface Multiplexed Balls Sheet 2

IXF1104 specifications

The Intel IXF1104 is a cutting-edge Network Interface Controller (NIC) designed to meet the needs of high-speed communication in modern networking environments. As the demand for bandwidth-intensive applications continues to grow, Intel's IXF1104 is engineered to deliver exceptional performance, reliability, and scalability, making it an ideal choice for data centers and enterprise networks.

One of the main features of the IXF1104 is its support for high-speed Ethernet connectivity, providing up to 100 Gbps throughput. This capability allows organizations to handle large amounts of data traffic efficiently, accommodating everything from cloud computing to big data analytics. The NIC utilizes advanced packet processing technology which ensures minimal latency, enhancing the overall user experience.

The IXF1104 is built on a robust architecture that integrates Intel's latest processing technologies. It incorporates a multi-core processing engine that allows for parallel processing of network packets, improving the handling of simultaneous network requests. This architecture also supports offloading features, freeing up CPU resources for other critical tasks, which optimizes system performance.

In terms of technologies, the IXF1104 supports a variety of standards including Ethernet and Fiber Channel, making it versatile across different networking environments. Its compatibility with industry-standard networking protocols ensures that it can easily integrate into existing frameworks, facilitating seamless upgrades and expansions.

Another significant characteristic of the IXF1104 is its energy efficiency. With Intel’s focus on sustainability, this NIC is designed to consume less power relative to its performance output, thereby reducing overall operational costs for organizations. It employs dynamic power management features that adjust power usage based on demand, which is especially beneficial in large-scale deployments.

Additionally, security features are woven into the IXF1104 design, protecting sensitive data from potential threats. Hardware-based security functions, including encryption capabilities and secure boot processes, ensure that the NIC can safeguard data integrity against unauthorized access.

Overall, the Intel IXF1104 stands out in the crowded NIC market by offering high-performance capabilities, energy efficiency, and robust security features. Its combination of advanced technologies and characteristics positions it as a strategic asset for modern networks, empowering organizations to achieve their connectivity and performance goals in an increasingly data-driven world.