Intel IXF1104 manual RX Fifo Low Watermark Port 2 $0x58C, RX Fifo Low Watermark Port 3 $0x58D

Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller

2

Table 119. RX FIFO Low Watermark Port 2 ($0x58C)

Bit	Name	Description	Type1	Default
Register Description: The default value of 0x072 represents 114 eight-byte locations. This
equates to 912 bytes of data. A unit entry in this register equates to 8 bytes of data. When the
amount of data stored in the RX FIFO falls below the Low Watermark, flow control is				0x072
automatically de-asserted within the MAC to allow more line-side data to be captured by the
RX FIFO.
31:12	Reserved	Reserved	RO	0x00000
	RX FIFO Low	The High Watermark value
11: 0		NOTE: Should never be greater or equal to the	R/W	0x072
	Watermark Port 2
		High Watermark.

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 120. RX FIFO Low Watermark Port 3 ($0x58D)

Bit	Name	Description	Type1	Default
Register Description: The default value of 0x072 represents 114 eight-byte locations. This
equates to 912 bytes of data. A unit entry in this register equates to 8 bytes of data. When the
amount of data stored in the RX FIFO falls below the Low watermark, flow control is				0x072
automatically de-asserted within the MAC to allow more line-side data to be captured by the
RX FIFO.
31:12	Reserved	Reserved	RO	0x00000
		The High watermark value
11: 0	RX FIFO Low		R/W	0x072
	Watermark Port 3	NOTE: Should never be greater or equal to the
		High Watermark.

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 121. RX FIFO Overflow Frame Drop Counter Ports 0 - 3 ($0x594 – 0x597)

Name	Description	Address	Type1	Default
RX FIFO Overflow	When RX FIFO on port 0 becomes full or
Frame Drop	reset, the number of frames lost/dropped on	0x594	R	0x00000000
Counter on port 0	this port are shown in this register.
RX FIFO Overflow	When RX FIFO on port 1 becomes full or
Frame Drop	reset, the number of frames lost/dropped on	0x595	R	0x00000000
Counter on port 1	this port are shown in this register.
RX FIFO Overflow	When RX FIFO on port 2 becomes full or
Frame Drop	reset, the number of frames lost/dropped on	0x596	R	0x00000000
Counter on port 2	this port are shown in this register.
RX FIFO Overflow	When RX FIFO on port 3 becomes full or
Frame Drop	reset, the number of frames lost/dropped on	0x597	R	0x00000000
Counter on port 3	this port are shown in this register.

1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

195 Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005