Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller

Table 86. Short Runts Threshold ($ Port_Index + 0x14)

Name

Description

Address

Type1

Default

 

 

 

 

 

 

The 5-bit configuration holds the value in bytes,

 

 

 

 

which applies to the threshold in determining

 

 

 

 

between runts and short. The bits 4:0 of this

 

 

 

 

register are alone used.

 

 

 

 

A received packet is reported as a short packet

 

 

 

 

when the length (excluding Preamble and

 

 

 

 

SFD) is less than this value.

 

 

 

Short Runts

A received packet is reported as a runt packet

Port_Index +

R/W

0x00000008

Threshold

when the length (excluding Preamble and

0x14

 

 

 

SFD) is equal to or greater than this value and

 

 

 

 

less than 64-bytes.

 

 

 

 

NOTE: This register is only relevant when the

 

 

 

 

IXF1104 MAC port is configured for

 

 

 

 

copper operation (the line side

 

 

 

 

interface is configured for either RGMII

 

 

 

 

or GMII).

 

 

 

 

 

 

 

 

1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 87. Discard Unknown Control Frame ($ Port_Index + 0x15)

Bit

Name

Description

Type1

Default

 

 

 

 

 

Register Description: Discards or forwards unknown control frames. Known control frames

0x00000000

are pause frames.

 

 

 

 

 

 

 

 

 

 

31:1

Reserved

Reserved

R

0x00000000

 

 

 

 

 

0

Discard Unknown

0 = Forward unknown control frames

R/W

0

Control Frame

1 = Discard unknown control frames

 

 

 

 

 

 

 

 

1. RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

Table 88. RX Config Word ($ Port_Index + 0x16) (Sheet 1 of 2)

Bit

Name

Description

Type1

Default

 

 

 

 

 

Register Description: This register is used in fiber MAC only for auto-negotiation and to report

 

the receive status. The lower 16 bits of this register are the “config_reg” received from the link

0x00000000

partner, as described in IEEE 802.3 2000 Edition, Section 37.2.1.

 

 

 

 

 

 

 

31:22

Reserved

Reserved

RO

0x000

 

 

 

 

 

 

 

Auto-negotiation complete. This bit remains

 

 

 

 

cleared from the time auto-negotiation is reset until

 

 

21

An_complete

auto-negotiation reaches the “LINK_OK” state. It

RO

0

remains set until auto-negotiation is disabled or

 

 

 

 

 

 

restarted.

 

 

 

 

This bit is only valid if auto-negotiation is enabled.

 

 

 

 

 

 

 

 

 

0 = Loss of synchronization

 

 

20

Rx Sync

1 = Bit synchronization. The bit remains Low until

RO

0

 

 

the register is read.

 

 

 

 

 

 

 

1.RO = Read Only, No clear on Read; R = Read, Clear on Read; W = Write only; R/W = Read/Write, No clear; R/W/C = Read/Write, Clear on Write

169

Datasheet

Document Number: 278757

Revision Number: 009

Revision Date: 27-Oct-2005

Page 169
Image 169
Intel IXF1104 manual Short Runts Threshold $ PortIndex +, Discard Unknown Control Frame $ PortIndex +

IXF1104 specifications

The Intel IXF1104 is a cutting-edge Network Interface Controller (NIC) designed to meet the needs of high-speed communication in modern networking environments. As the demand for bandwidth-intensive applications continues to grow, Intel's IXF1104 is engineered to deliver exceptional performance, reliability, and scalability, making it an ideal choice for data centers and enterprise networks.

One of the main features of the IXF1104 is its support for high-speed Ethernet connectivity, providing up to 100 Gbps throughput. This capability allows organizations to handle large amounts of data traffic efficiently, accommodating everything from cloud computing to big data analytics. The NIC utilizes advanced packet processing technology which ensures minimal latency, enhancing the overall user experience.

The IXF1104 is built on a robust architecture that integrates Intel's latest processing technologies. It incorporates a multi-core processing engine that allows for parallel processing of network packets, improving the handling of simultaneous network requests. This architecture also supports offloading features, freeing up CPU resources for other critical tasks, which optimizes system performance.

In terms of technologies, the IXF1104 supports a variety of standards including Ethernet and Fiber Channel, making it versatile across different networking environments. Its compatibility with industry-standard networking protocols ensures that it can easily integrate into existing frameworks, facilitating seamless upgrades and expansions.

Another significant characteristic of the IXF1104 is its energy efficiency. With Intel’s focus on sustainability, this NIC is designed to consume less power relative to its performance output, thereby reducing overall operational costs for organizations. It employs dynamic power management features that adjust power usage based on demand, which is especially beneficial in large-scale deployments.

Additionally, security features are woven into the IXF1104 design, protecting sensitive data from potential threats. Hardware-based security functions, including encryption capabilities and secure boot processes, ensure that the NIC can safeguard data integrity against unauthorized access.

Overall, the Intel IXF1104 stands out in the crowded NIC market by offering high-performance capabilities, energy efficiency, and robust security features. Its combination of advanced technologies and characteristics positions it as a strategic asset for modern networks, empowering organizations to achieve their connectivity and performance goals in an increasingly data-driven world.