Intel® IXF1104 4-Port Gigabit Ethernet Media Access Controller
Datasheet 42
Document Number: 278757
Revision Number: 009
Revision Date: 27-Oct-2005
DTPA_0
DTPA_1
DTPA_2
DTPA_3
DTPA_0
DTPA_1
DTPA_2
DTPA_3
D3
L1
A9
J7
Output 3.3 V
LVTTL
DTPA_0:3 Direct Transmit Packet
Available.
A direct status indication for transmit FIFOs
of ports 0:3.
When High, DTPA indicate s that th e amount
of data in the TX FIFO is below the TX FIF O
High watermark. When th e High watermark
is crossed, DTPA transitions Low to indi cate
that the TX FIFO is almost full. It stays Low
until the amount of data in the TXFIFO
goes back below the TX FIFO Low
watermark. At this point, DTPA transitio ns
High to indicate that the programmed
number of bytes are now available for data
transfers.
NOTE: For more information, see
Table132 “TX FIFO High
Watermark Ports 0 - 3 ($0x600 –
0x603)” on page 203 and Table 133
“TX FIFO Low Watermark R egister
Ports 0 - 3 ($0x60A – 0x60D)” on
page 204.
DTPA is updated on the rising edge of
TFCLK.
STPA NA C11 Output 3.3 V
LVTTL
Selected-PHY Transmit Packet Avail ab le .
STPA is only meaningful in a 32-bit multi-
PHY mode.
STPA is a direct status indicat ion for
transmit FIFOs of ports 0:3.
When High, STPA in dica te s th at t he a mou nt
of data in the TX FIFO, specified by the
latest in-band address, is below the
TX FIFO High watermark. When the High
watermark is crossed, S TPA transitions Low
to indicate the TX FIFO is almos t full. It
stays Low until the amount of data in the
TXFIF O goes back below the TX FIFO Low
watermark. At this point, STPA transitio ns
High to indicate that the programmed
number of bytes are now available for data
transfers.
NOTE: For more information, see
Table132 “TX FIFO High
Watermark Ports 0 - 3 ($0x600 –
0x603)” on page 203 and Table 133
“TX FIFO Low Watermark R egister
Ports 0 - 3 ($0x60A – 0x60D)” on
page 204.
STPA provides the status indi cation for the
selected port to avoid FIFO o verflows while
polling is performed. Th e port reported by
STPA is updated on the following rising
edge of TFCLK after TSX is sampled as
asserted. STPA is upda ted on the rising
edge of TFCLK.
Table 3. SPI3 Interface Signal Descriptions (Sheet 4 of 8)
Signal Name Ball
Designator Type Standard Description
MPHY SPHY