Marvel Group Clocking 88F6281Clocks, Supported Clock Combinations, Sata PHY PLL, Ptpclk

Clocking

Table 29: 88F6281Clocks (Continued)

Clock Type	Description
SATA PHY PLL	•	Reference clock:
		REF_CLK_XIN (25 MHz)
	•	Derivative clock:
		SATA Clock (150 MHz)
RTC	•	Reference clock:
		RTC_XIN (32.768 kHz)
	Used for real time clock functionality, see the Real Time Clock section in the
	88F6180, 88F6190, 88F6192, and 88F6281 Functional Specifications.
PTP	•	Reference clock:
		PTP_CLK (125 MHz)
	The PTP_CLK can be used for the following functions:
	• PTP time stamp clock
		Two options for reference clock:
		- PTP_CLK
		- Gigabit Ethernet Clock (125 MHz)
	•	TS unit clock
		Two options for reference clock:
		- PTP_CLK/2
		- Core PLL
	•	Audio unit clock
		Two options for reference clock:
		- PTP_CLK
		- REF_CLK_XIN (25 MHz)
	For clocking configuration registers, see the 88F6180, 88F6190, 88F6192, and
	88F6281 Functional Specifications.

The following table lists the supported combinations of the CPU_CLK Frequency select, CPU_CLK to DDR CLK ratio, and to CPU_CLK to CPU L2 clock ratio (see Section 6.5, Pins Sample Configuration, on page 66).

Table 30: Supported Clock Combinations

DDR Clock	CPU to DDR	CPU Clock	CPU to L2	L2 Clock
(MHz)	Clock Ratio	(MHz)	Clock Ratio	(MHz)
333	3:1
250	4:1	1000	3:1	333
200	5:1
400	3:1
300	4:1	1200	3:1	400
267	4.5:1
200	6:1
375	4:1	1500	3:1	500

Copyright © 2008 Marvell		Doc. No. MV-S104859-U0 Rev. E
December 2, 2008, Preliminary	Document Classification: Proprietary Information	Page 61