Motorola MVME1X7P manual Local-Bus-to-VMEbus I/O Control Register

2

VMEchip2

Local-Bus-to-VMEbus I/O Control Register

ADR/SIZ				$FFF4002C (8 bits of 32)
BIT	15	14		13	12	11	10	9	8
NAME	I2EN	I2WP		I2SU	I2PD	I1EN	I1D16	I1WP	I1SU
OPER	R/W	R/W		R/W	R/W	R/W	R/W	R/W	R/W
RESET	0 PSL	0 PS		O PS	0 PS	0 PS	O PS	0 PS	O PS
	This register controls the VMEbus short I/O map and the F page
	($F0000000 through $FF7FFFFF) I/O map.
	I1SU		When this bit is high, the VMEchip2 drives a supervisor
			address modifier code when the short I/O space is
			accessed. When this bit is low, the VMEchip2 drives a
			user address modifier code when the short I/O space is
			accessed.
	I1WP		When this bit is high, write posting is enabled to the
			VMEbus short I/O segment. When this bit is low, write
			posting is disabled to the VMEbus short I/O segment.
	I1D16		When this bit is high, D16 data transfers are performed to
			the VMEbus short I/O segment. When this bit is low, D32
			data transfers are performed to the VMEbus short I/O
			segment.
	I1EN		When this bit is high, the VMEbus short I/O map decoder
			is enabled. When this bit is low, the VMEbus short I/O
			map decoder is disabled.
	I2PD		When this bit is high, the VMEchip2 drives a program
			address modifier code when the F page is accessed. When
			this bit is low, the VMEchip2 drives a data address
			modifier code when the F page is accessed.
	I2SU		When this bit is high, the VMEchip2 drives a supervisor
			address modifier code when the F page is accessed. When

this bit is low, the VMEchip2 drives a user address modifier code when the F page is accessed.

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