Programming Model

Receive PIACK Register

ADR/SIZ

 

 

 

$FFF42027 (8 bits)

 

 

 

 

 

 

 

 

 

 

 

 

 

 

BIT

7

6

5

 

4

3

 

2

1

0

 

 

 

 

 

 

 

 

 

 

 

NAME

RIV7

RIV6

RIV5

 

RIV4

RIV3

 

RIV2

RIV1

RIV0

 

 

 

 

 

 

 

 

 

 

 

OPER

R

R

R

 

R

R

 

R

R

R

 

 

 

 

 

 

 

 

 

 

 

RESET

X

X

X

 

X

X

 

X

X

X

 

 

 

 

 

 

 

 

 

 

 

The Receive PIACK Register is used to execute receive pseudo interrupt acknowledge cycles to the CD2401.

When the Local Bus master initiates a read cycle to this register, the PCCchip2 executes an interrupt acknowledge cycle to the CD2401 with A7-A0 = $03. (Note that the PILR1 register in the CD2401 should be set to the same value ($03) for the interrupt acknowledge cycle to operate properly.)

To finish the local read cycle, the PCCchip2 drives the vector received from the CD2401 onto the local data bus, and asserts TA*. Reads to this register are termed pseudo interrupt acknowledge cycles because they are normal read cycles on the Local Bus side but they are interrupt acknowledge cycles on the CD2401 side of the PCCchip2. They are necessary to support polled mode operation with the CD2401.

Note If this register is read when an interrupt is not present, the interrupt acknowledge cycle times out with a TEA if the Local Bus timer is enabled.

RIV7-RIV0Receive Interrupt vector bits 7-0 reflect the transmit interrupt vector driven by the CD2401 to the PCCchip2 during a pseudo interrupt acknowledge cycle.

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Image 231
Motorola MVME1X7P manual Receive Piack Register