Motorola MVME1X7P manual Local Bus Interrupter Status Register bits

Models: MVME1X7P

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LCSR Programming Model

Local Bus Interrupter Status Register (bits 24-31)

ADR/SIZ

 

 

$FFF40068 (8 bits of 32)

 

 

 

 

 

 

 

 

 

 

 

BIT

31

30

29

28

27

26

25

24

 

 

 

 

 

 

 

 

 

NAME

ACF

AB

SYSF

MWP

PE

VI1E

TIC2

TIC1

 

 

 

 

 

 

 

 

 

OPER

R

R

R

R

R

R

R

R

 

 

 

 

 

 

 

 

 

RESET

0 PSL

0 PSL

0 PSL

0 PSL

0 PSL

0 PSL

0 PSL

0 PSL

 

 

 

 

 

 

 

 

 

This register is the local bus interrupter status register. When an interrupt status bit is high, a local bus interrupt is being generated. When an interrupt status bit is low, a local interrupt is not being generated. The interrupt status bits are:

TIC1

Tick timer 1 interrupt.

TIC2

Tick timer 2 interrupt

VI1E

VMEbus IRQ1 edge-sensitive interrupt.

PE

Not used on MVME1x7P.

MWP

VMEbus master write post error interrupt.

SYSF

VMEbus SYSFAIL interrupt.

AB

Not used on MVME1x7P.

ACF

VMEbus ACFAIL interrupt.

2

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Page 167
Image 167
Motorola MVME1X7P manual Local Bus Interrupter Status Register bits