Motorola MVME1X7P manual Sdram Configuration Register, SDCFG2-SDCFG0

Programming Model

SDRAM Configuration Register

ADR/SIZ			1st $FFF4307c/2nd $FFF4317c (8-bits)
BIT	31	30		29	28	27	26	25	24
NAME	0	0		0	0	0	SDCFG2	SDCFG1	SDCGF0
OPER	R	R		R	R	R	R	R	R
RESET	0 PLS	0 PLS		0 PLS	V PLS	V PLS	V PLS	V PLS	V PLS

SDCFG2-SDCFG0

Define the physical SDRAM memory population on the printed circuit board:

SDCFG2	SDCFG1	SDCFG0	DRAM Array Size
0	0	0	SDRAM device is 64MBit x 16 data with
			one bank composed of 3 devices
0	0	1	SDRAM device is 64MBit x 8 data with
			one bank composed of 5 devices
0	1	0	SDRAM device is 64MBit x 8 data with
			two banks composed of 5 devices each
0	1	1	SDRAM device is 64MBit x 8 data with
			four banks composed of 5 devices each
1	0	0	SDRAM device is 128MBit x 8 data with
			one bank composed of 5 devices
1	0	1	SDRAM device is 128MBit x 8 data with
			two banks composed of 5 devices each
1	1	0	reserved
1	1	1	reserved

4

http://www.motorola.com/computer/literature 4-33