Motorola MVME1X7P manual Memory Maps, Local Bus Memory Map, Normal Address Range

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Programming Issues

8.32-bit prescaler. The prescaler can also be accessed at $FFF40064 when the optional VMEbus is not enabled.

Memory Maps

There are two points of view for memory maps:

1.The mapping of all resources as viewed by local bus masters (local bus memory map)

2.The mapping of onboard resources as viewed by VMEbus masters (VMEbus memory map)

The memory maps and I/O maps described in the following tables are correct for all local bus masters. Some address translation capability exists in the VMEchip2. This capability makes it possible to have multiple MVME1X7P modules on the same VMEbus with different virtual local bus maps as viewed by different VMEbus masters.

Local Bus Memory Map

The local bus memory map is split into different address spaces by the transfer type (TT) signals. The local resources respond to the normal access and interrupt acknowledge codes.

Normal Address Range

The following tables show the memory maps of devices that respond to the normal address range. The normal address range is defined by the Transfer Type (TT) signals on the local bus. On the MVME1X7P, Transfer Types 0, 1, and 2 define the normal address range.

Table 1-3is the entire map from $00000000 to $FFFFFFFF. Many areas of the map are user-programmable, and suggested uses are shown in the table. The cache inhibit function is programmable in the MC680x0 MMU.

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