Motorola MVME1X7P manual Board Control Register

2

VMEchip2

Board Control Register

ADR/SIZ			$FFF40060 (8 bits [7 used] of 32)
BIT	31	30	29	28	27	26	25	24
NAME		SCON	SFFL	BRFLI	PURS	CPURS	BDFLO	RSWE
OPER		R	R	R	R	C	R/W	R/W
RESET		X	X	1 PSL	1 P	0 PS	1 PSL	1 P
	RSWE	The RESET switch enable bit is used with the “no
		VMEbus interface” option. This bit is duplicated at the
		same bit position in the MC2 chip at location $FFF42044.
		When this bit or the duplicate bit in the MC2 chip is high,
		the RESET switch is enabled. When both bits are low, the
		RESET switch is disabled.
	BDFLO	When this bit is high, the VMEchip2 asserts the
		BRDFAIL signal pin. When this bit is low, this bit does
		not contribute to the BRDFAIL signal on the VMEchip2.
	CPURS	When this bit is set high, the powerup reset status bit is
		cleared. This bit is always read 0.
	PURS	This bit is set by a powerup reset. It is cleared by a write
		to the CPURS bit.
	BRFLI	When this status bit is high, the BRDFAIL signal pin on
		the VMEchip2 is asserted. When this status bit is low, the
		BRDFAIL signal pin on the VMEchip2 is not asserted.
		The BRDFAIL pin may be asserted by an external device,
		the BDFLO bit in this register, or a watchdog time-out.
	SFFL	When this status bit is high, the SYSFAIL signal line on
		the VMEbus is asserted. When this status bit is low, the
		SYSFAIL signal line on the VMEbus is not asserted.
	SCON	When this status bit is high, the VMEchip2 is configured
		as system controller. When this status bit is low, the
		VMEchip2 is not configured as system controller.

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