CHAPTER 3 NDA-24296
Page 214
Revision 1.0
PH-CK17
Phase Lock Oscillato r
5. Switch Settings
Standard settings for switches on this circuit card are shown in the table below.
SWITCH
NAME SETTING STANDARD
SETTING MEANING
MB UP C irc uit card Ma ke- busy.
DOWN ×C ircui t card Ma ke- busy can c el.
SW03 1 - F 1 Fixed to 1.
SWITCH
NAME SWITCH
NO. SETTING S TANDARD
SETTING MEANING
SW01
1ON Clock subordinate office.
OFF Clock source office.
2ON Digital Clock Supply route zero (DCS 0) is used.
OFF Digital Clock Supply route zero (DCS 0) is not used.
3ON Digital Clock Supply route one (DCS 1) is used.
OFF Digital Clock Supply route one (DCS 1) is not used.
4
ON 8 KHz of Frame Head signa ls are extracted from t he DCS signals
(which is composed of 64 KHz + 8 KHz).
OFF 8 KHz of Frame Head signals are not extracted from the DCS
signals (which is composed of 64 KHz + 8 KHz).
5
ON When clock source failure has occurred in all supply routes, the
PLO outputs the original clock of the internal oscillator.
OFF When clock source failure has occurred in all supply routes, the
PLO continues outputting the cu rrent phas e clock.
6
ON This circuit card is associated with SYNC (P A-CK16 WCS) card
and 5 m Fr ame Pulse (FP) is supplied by the SYNC card.
OFF This circuit card is not associated with SYNC (PA-CK16 WCS)
card.
7ON A-law CODEC is used for the hold music.
OFF ×µ-law CODEC is used for the hold music.
8 OFF ×Not used.