PH-CK17-A

Phase Lock Oscillator

Figure 3-31shows an example of distributing clock from a digital interface in LN/LMG. This example assumes that the Digital Trunk POUT leads are used as the first clock distribution route.

maximum 200 meters (660 feet) (24AWG)

LN/LMG

Digital

Interface

ISW/CMG

PLO#0

EXCLK0

PLO#1

EXCLK1

LT Connector

Installation Cable

RA

 

RB

 

TA

maximum 100

TB

meters (330 feet)

POUTA

(24AWG)

POUTB

 

Installation Cable

DIU0A0

DIU0B0

DIU1A0

DIU1B0

DIU2A0

DIU2B0

DIU3A0

DIU3B0

Installation Cable

DIU0A1

DIU0B1

DIU1A1

DIU1B1

DIU2A1

DIU2B1

DIU3A1

DIU3B1

MDF

PCM Cable (2P)

Note 1

Note 2

PCM

Carrier

Equipment

DSU

to other node

CLK

Note 1: PLO has a maximum 4 inputs. DIU0xx leads are used for the 1st clock distribution routes. DIU3xx leads are used for the 4th. The first input has the highest priority.

Note 2: The connection is required for a dual PLO system.

Figure 3-31 Cable Connection Diagram (ISWM) for Receiving Clock from Digital Interface

CHAPTER 3

NDA-24296

Page 234

Revision 1.0

Page 260
Image 260
NEC 2400 ipx manual Ln/Lmg

2400 ipx specifications

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