Detailed Description
FMC bypass jumper J19 must be connected between pins
J19
Bypass FMC LPC J2 = Jumper
Include FMC LPC J2 = Jumper
H - 1x3
1
FMC_TDI_BUF
2
SYSACE_TDI
3
FMC_TD0
UG526_07_092409
Figure 1-7: VITA 57.1 FMC LPC (J2) JTAG Bypass Jumper J19
The JTAG chain can be used to program the FPGA and access the FPGA for hardware and software debug.
The JTAG connector (USB
7. Clock Generation
There are three clock sources available on the SP605.
Oscillator (Differential)
The SP605 has one 2.5V LVDS differential 200 MHz oscillator (U6) soldered onto the board and wired to an FPGA global clock input.
•Crystal oscillator: Epson
•PPM frequency jitter: 50 ppm
References
See the Epson
SP605 Hardware User Guide | www.xilinx.com | 23 |
UG526 (v1.1.1) February 1, 2010