Chapter 1: SP605 Evaluation Board
9. PCI Express Endpoint Connectivity
The
The SP605 board trace impedance on the PCIe lane supports Gen1 applications. The SP605 supports Gen1 x1.
Table 1-11: PCIe Edge Connector Connections
U1 FPGA Pin | Schematic Net Name | P4 PCIe Edge Connector | ||
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Pin Number | Pin Name | |||
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C7 | PCIE_RX0_N | B15 | PETn0 | |
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D7 | PCIE_RX0_P | B14 | PETp0 | |
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A6 | PCIE_TX0_N(1) | A17 | PERn0 | |
B6 | PCIE_TX0_P(1) | A16 | PERp0 | |
– | PCIE_CLK_QO_N(2) | A14 | REFCLK- | |
– | PCIE_CLK_QO_P(2) | A13 | REFCLK+ | |
B10 | PCIE_250M_N(3) | U48.17(4) | NQ | |
A10 | PCIE_250M_P(3) | U48.18(4) | Q | |
J7 | PCIE_PERST_B_LS | A11 | PERST(5) |
Notes:
1.Each of the TX0_N/P signals has a 0.1uF series capacitor.
2.PCIE_CLK_QO_N/P is the PC motherboard 100MHZ REFCLK.
3.Each of the PCIE_250M_N/P signals has a 0.1uF series capacitor.
4.U48 is an ICS874001 clock multiplier device (U48.17/18 are not P4 pins).
5.The PERST signal from pin P4.A11 is isolated by a series resistor and then
The PCIe interface obtains its power from the DC power supply provided with the SP605 or through the 12V ATX power supply connector. The PCIe edge connector is not used for any power connections.
The board can be powered by one of two 12V sources; J18, a
The
For applications requiring additional power, such as the use of expansion cards drawing significant power, a larger AC adapter might be required. If a different AC adapter is used, its load regulation should be better than ±10%.
SP605 power slide switch SW2 turns the board on and off by controlling the 12V supply to the board.
Caution! Caution! Never apply power to the power brick
28 | www.xilinx.com | SP605 Hardware User Guide |
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| UG526 (v1.1.1) February 1, 2010 |