DSingle-Chip 100-/1000-Mbit/s Device
DIntegrated Physical Coding Sublayer (PCS) Logic Provides Direct Interface to Gigabit Transceivers
DIntegrated Address-Lookup Engine and Table Memory for 2-K Addresses
DSupports IEEE Std 802.1Q Virtual-LAN (VLAN) Tagging Scheme
DProvides Data Path for Network Management Information [No External Media-Access Control (MAC) Required]
DFull-Duplex IEEE Std 802.3 Flow Control
DHalf-Duplex Back-Pressure Flow Control
DFully Nonblocking Architecture Using High-Bandwidth Rambus Memory
DSimple Expansion Via the Gigabit Interface for Higher-Density Port Solutions
DPort Trunking/Load Sharing for High-Bandwidth Interswitch Links
DSupports Pretag Extended Port Awareness
DEEPROM Interface for Autoconfiguration (No CPU Required for Nonmanaged Switch)
DProvides Direct Input/Output (DIO) Interface for Configuration and Statistics Information
DSupports On-Chip Per-Port Storage for Etherstat and Remote Monitoring (RMON)
Management Information Bases (MIBs)
DFabricated in 2.5-/3.3-V Low-Voltage Technology
DSupports Ring-Cascade Mode
DSupports Spanning Tree
DPackaged in 352-Terminal Ball Grid Array Package
description
The TNETX4090 is a 9-port 100-/1000-Mbit/s nonblocking Ethernet switch with an on-chip address-lookup engine. The TNETX4090 provides a low-cost, high-performance switch solution. The TNETX4090 is a fully manageable desktop switch solution achieved by combining the TNETX4090 with physical interfaces and high-bandwidth rambus-based packet memory and a CPU. The TNETX4090 also provides an interface capable of receiving and transmitting simple-network management protocol (SNMP) and bridge protocol data units (BPDU) (spanning tree) frames.
The TNETX4090 provides eight 10-/100-Mbit/s interfaces and one 100-/1000-Mbit/s interface. In half-duplex mode, all ports support back-pressure flow control to reduce the risk of data loss for a long burst of activity. In the full-duplex mode of operation, the device uses IEEE Std 802.3 frame-based flow control. With full-duplex capability, ports 0±7 support 200-Mbit/s aggregate bandwidth connections. Port 8 supports 2 Gbit/s to desktops, high-speed servers, hubs, or other switches in the full-duplex mode. The physical coding sublayer (PCS) function is integrated on chip to provide a direct 10-bit interface to the gigabit Ethernet transceiver. The TNETX4090 also supports port trunking/load sharing on the 10-/100-Mbit ports. This can be used to group ports on interswitch links to increase the effective bandwidth between the systems. In the ring-cascade mode, port 8 can be used to connect multiple devices in a ring topology, which provides a low-cost, high-port-density desktop switch. Pretagging and extended port awareness allow the TNETX4090 to be used as a front end to a router or crossbar switch to build a cost-effective, high-density, high-performance system.
The internal address-lookup engine (IALE) supports up to 2-K unicast/multicast and broadcast addresses and up to 64 IEEE Std 802.1Q VLANs. For interoperability, each port can be programmed as an access port or non-access port to recognize VLAN tags and transmit frames with VLAN tags to other systems that support VLAN tagging. The IALE performs destination- and source-address comparisons and forwards unknown source- and destination-address packets to ports specified via programmable masks.
Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet.
TI, ThunderSWITCH, and ThunderSWITCH II are trademarks of Texas Instruments Incorporated. Ethernet and Etherstat are trademarks of Xerox Corporation.
Secure Fast Switching is a trademark of Cabletron Systems, Inc.
Port-trunking and load-sharing algorithms were contributed by Cabletron Systems, Inc. and are derived from, and compatible with, Secure Fast Switching .
