144 AMD Geodeā„¢ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.41 C3/C2 Linear Instruction Pointer MSR (C3_C2_LIP_MSR)
C3_C2_LIP_MSR provides access to linear instruction pointers when the code segment was loaded.
5.5.2.42 Floating Point Environment Code Segment (FPENV_CS_MSR)
FPENV_CS_MSR provides access to the floating point (FP) environment code segment. Software better accesses the
floating point environment data using the FLDENV/FSTENV and FSAVE/FRSTOR instructions.
MSR Address 00001367h
Type RO
Reset Value 00000000_00000000h
C3_C2_LIP_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
C3_LIP
313029282726252423222120191817161514131211109876543210
C2_LIP
C3_C2_LIP_MSR Bit Descriptions
Bit Name Description
63:32 C3_LIP CS 3 Linear Instruction Pointer. Fourth most recent linear instruction point when code
segment was loaded.
31:0 C2_LIP CS 2 Linear Instruction Pointer. Third most recent linear instruction point when code
segment was loaded.
MSR Address 00001370h
Type R/W
Reset Value 00000000_00000000h
FPENV_CS_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
313029282726252423222120191817161514131211109876543210
RSVD CS
FPENV_CS_MSR Bit Descriptions
Bit Name Description
63:16 RSVD Reserved.
15:0 CS Code Segment. Selector of code segment of last FP instruction that may have caused
an FP error.