326 AMD Geodeā„¢ LX Processors Data Book
Display Controller Register Descriptions
33234H
6.6.4.9 DC Graphics Pitch (DC_GFX_PITCH)
This register stores the pitch for the graphics display buffers.
6.6.4.10 DC Video YUV Pitch (DC_VID_YUV_PITCH)
This register stores the pitch for the video buffers.
DC Memory Offset 034h
Type R/W
Reset Value xxxxxxxxh
DC_GFX_PITCH Register Map
313029282726252423222120191817161514131211109876543210
CB_PITCH FB_PITCH
DC_GFX_PITCH Bit Descriptions
Bit Name Description
31:16 CB_PITCH Compressed Display Buffer Pitch. This value represents the number of QWORDs
between consecutive scan lines of compressed buffer data in memory. This pitch must
be set to a multiple of four QWORDs (i.e., bits [17:16] must be 00).
15:0 FB_PITCH Frame Buffer Pitch. This value represents the number of QWORDs between consecu-
tive scan lines of frame buffer data in memory.
DC Memory Offset 038h
Type R/W
Reset Value xxxxxxxxh
DC_VID_YUV_PITCH Register Map
313029282726252423222120191817161514131211109876543210
UV_PITCH Y_PITCH
DC_VID_YUV_PITCH Bit Descriptions
Bit Name Description
31:16 UV_PITCH Video U and V Buffer Pitch. This value represents the number of QWORDs between
consecutive scan lines of U or V buffer data in memory. (U and V video buffers are
always the same pitch.) A pitch up to 512 KB is supported to allow for vertical decimation
for downscaling.
15:0 Y_PITCH Video Y Buffer Pitch. This value represents the number of QWORDs between consecu-
tive scan lines of Y buffer data in memory. A pitch up to 512 KB is supported to allow for
vertical decimation for downscaling.