274 AMD Geodeā„¢ LX Processors Data Book
Graphics Processor Register Definitions
33234H
29 X X Direction for Fetch. Data is reversed if fetch direction does not match destination
direction.
0: Left to right direction.
1: Right to left direction.
28 Y Y Direction for Fetch. Data is reversed if fetch direction does not match destination
direction.
0: Top to bottom direction.
1: Bottom to top direction.
27:24 BPP/FMT Color Depth and Format of Input.
0000: 8-bpp 3:3:2.
0001: 8-bpp indexed.
0010: 8-bpp alpha.
0100: 16-bpp 4:4:4:4.
0110: 16-bpp 0:5:6:5.
0111: 4:2:2 YUV.
1000: 32-bpp.
1011: 24-bpp packed.
1101: 4-bpp indexed.
1110: 4-bpp alpha.
All others: Undefined.
23 RO Rotate Bitmap.
0: Disable rotation.
1: Enable rotation direction determined by X and Y. See Section 6.3.2.1 "Rotating BLTs"
on page 242.
22 BGR BGR Mode (applies only when 16-bpp or 32-bpp).
0: Pass through (or YUY2 for 4:2:2 mode).
1: Swap red and blue channels on output (or UYVY for 4:2:2 mode).
21 PM Pattern Mode.
0: Bitmap mode, data from memory or host source.
1: Pattern mode.
20 PL Prese rve LUT Data.
0: Entire 2K buffer available for fetch data.
1: 1K reserved for LUT.
19 PE Prefetch Enable. When this bit is set, data may be fetched while the BLT is still pending.
18 HS Host Source.
0: Data fetched from memory.
1: Data written through host source writes.
17:16 RSVD Reserved.
15:0 STRIDE Stride. Increment between lines of bitmap in bytes.
GP_CH3_MODE_STR Bit Descriptions (Continued)
Bit Name Description