374 AMD Geodeā„¢ LX Processors Data Book
Display Controller Register Descriptions
33234H
6.6.20.2 VGA Graphics Controller Data
6.6.20.3 VGA Set/Reset
Bits [3:0] allow bits in their respective maps to be set or reset through write modes 0 or 3. See Section 6.5.5.3 "Write
Modes" on page 290 for more information.
6.6.20.4 VGA Enable Set/Reset
Bits [3:0] enable the Set/Reset function for their respective maps in write mode 0. See Section 6.5.5.3 "Write Modes" on
page 290 for more information.
Data Address 3CFh
Type R/W
Reset Value xxh
VGA Graphics Controller Data Register Bit Descriptions
Bit Name Description
7:4 RSVD Reserved.
3:0 DATA Data.
Index 00h
Type R/W
Reset Value xxh
VGA Set/Reset Register Bits Bit Descriptions
Bit Name Description
7:4 RSVD Reserved.
3SR_MP3 Set/Reset Map 3.
2SR_MP2 Set/Reset Map 2.
1SR_MP1 Set/Reset Map 1.
0SR_MP0 Set/Reset Map 0
Index 01h
Type R/W
Reset Value xxh
VGA Enable Set/Reset Register Bit Descriptions
Bit Name Description
7:4 RSVD Reserved.
3 EN_SR_MP3 Enable Set/Reset Map 3.
2 EN_SR_MP2 Enable Set/Reset Map 2.
1 EN_SR_MP1 Enable Set/Reset Map 1.
0 EN_SR_MP0 Enable Set/Reset Map 0.