AMD Geodeā„¢ LX Processors Data Book 199
CPU Core Register Descriptions 33234H
31:28 TYPE3 Breakpoint 3 Type. Selects the type of extended breakpoint 3.
0000: IM memory read (Default).
0001: DM memory read.
0010: DM memory write.
0011: DM memory read/write.
0100: DM I/O read.
0101: DM I/O write.
0110: DM I/O read/write.
0111: GLBus snoop for read.
1000: GLBus snoop for write.
1001: GLBus snoop for write-invalidate.
1010: MSR read.
1011: MSR write.
All Others: Undefined, breakpoint will not trigger.
27:24 TYPE2 Breakpoint 2 Type. Selects the type of extended breakpoint 2. See TYPE3 (bits [31:28])
for decode.
23:20 TYPE1 Breakpoint 1 Type. Selects the type of extended breakpoint 1. See TYPE3 (bits [31:28])
for decode.
19:16 TYPE0 Breakpoint 0 Type. Selects the type of extended breakpoint 0. See TYPE3 (bits [31:28])
for decode.
15:4 RSVD Reserved. (Default = 0)
3E3 Breakpoint 3 Enable. Allows extended breakpoint 3 to be enabled.
0: Disable.
1: Enable.
2E2 Breakpoint 2 Enable. Allows extended breakpoint 2 to be enabled.
0: Disable.
1: Enable.
1E1 Breakpoint 1 Enable. Allows extended breakpoint 1 to be enabled.
0: Disable.
1: Enable.
0E0 Breakpoint 0 Enable. Allows extended breakpoint 0 to be enabled.
0: Disable.
1: Enable.
BDR7_MSR Bit Descriptions
Bit Name Description