AMD LX 600@0.7W, LX 700@0.8W, LX 800@0.9W, LX 900@1.5W - page 57

AMD Geode™ LX Processors Data Book 57
GLIU Register Descriptions 33234H
4.2.1.4 GLD Error MSR (GLD_MSR_ERROR)
The flags are set with internal conditions. The internal conditions are always capable of setting the flag, but if the mask is 1,
the flagged condition will not trigger the ERR signal. Reads to the flags return the value. Write = 1 to the flag, clears the
value. Write = 0 has no effect on the flag.
MSR Address GLIU0: 10002003h
GLIU1: 40002003h
Type R/W
Reset Value 00000000_00000000h
GLD_MSR_ERROR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD
EFLAG14 EFLAG13 EFLAG12 EFLAG11 EFLAG10
EFLAG9 EFLAG8 EFLAG7 EFLAG6 EFLAG5 EFLAG4 EFLAG3 EFLAG2 EFLAG1 EFLAG0
313029282726252423222120191817161514131211109876543210
RSVD
EMASK14 EMASK13 EMASK12 EMASK11 EMASK10
EMASK9 EMASK8 EMASK7 EMASK6 EMASK5 EMASK4 EMASK3 EMASK2 EMASK1 EMASK0
GLD_MSR_ERROR Bit Descriptions
Bit Name Description
63:47 RSVD Reserved.
46 EFLAG14 Data Comparator Error Flag 3. If high, records that an ERR was generated due to a
Data Comparator 3 (DA_COMPARE_VAL_LO3/DA_COMPARE_VAL_HI3, GLIU0 MSR
100000DCh/100000DDh, GLIU1 MSR 400000DCh/400000DDh) event. Write 1 to clear;
writing 0 has no effect. EMASK14 (bit 14) must be low to generate ERR and set flag.
45 EFLAG13 Data Comparator Error Flag 2. If high, records that an ERR was generated due to a
Data Comparator 2 (DA_COMPARE_VAL_LO2/DA_COMPARE_VAL_HI2, GLIU0 MSR
100000D8h/100000D9h, GLIU1 MSR 400000D8h/400000D9h) event. Write 1 to clear;
writing 0 has no effect. EMASK13 (bit 13) must be low to generate ERR and set flag.
44 EFLAG12 Data Comparator Error Flag 1. If high, records that an ERR was generated due to a
Data Comparator 1 (DA_COMPARE_VAL_LO1/DA_COMPARE_VAL_HI1, GLIU0 MSR
100000D4h/100000D5h, GLIU1 MSR 400000D4h/400000D5h) event. Write 1 to clear;
writing 0 has no effect. EMASK12 (bit 12) must be low to generate ERR and set flag.
43 EFLAG11 Data Comparator Error Flag 0. If high, records that an ERR was generated due to a
Data Comparator 0 (DA_COMPARE_VAL_LO0/DA_COMPARE_VAL_HI0, GLIU0 MSR
100000D0h/100000D1h, GLIU1 MSR 400000D0h/400000D1h) event. Write 1 to clear;
writing 0 has no effect. EMASK11(bit 11) must be low to generate ERR and set flag.
42 EFLAG10 Request Comparator Error Flag 3. If high, records that an ERR was generated due to a
Request Comparator 3 (RQ_COMPARE_VAL3, GLIU0 MSR 100000C6h, GLIU1 MSR
400000C6h) event. Write 1 to clear; writing 0 has no effect. EMASK10 (bit 10) must be
low to generate ERR and set flag.
41 EFLAG9 Request Comparator Error Flag 2. If high, records that an ERR was generated due to a
Request Comparator 2 (RQ_COMPARE_VAL2, GLIU0 MSR 100000C4h, GLIU1 MSR
400000C4h) event. Write 1 to clear; writing 0 has no effect. EMASK9 (bit 9) must be low
to generate ERR and set flag.
40 EFLAG8 Request Comparator Error Flag 1. If high, records that an ERR was generated due to a
Request Comparator 1 (RQ_COMPARE_VAL1, GLIU0 MSR 100000C2h, GLIU1 MSR
400000C2h) event. Write 1 to clear; writing 0 has no effect. EMASK8 (bit 8) must be low
to generate ERR and set flag.