AMD Geodeā„¢ LX Processors Data Book 361
Display Controller Register Descriptions 33234H
6.6.19 VGA CRT Controller Registers
The CRTC registers are accessed by writing an index value to the CRTC Index register (3B4h or 3D4h) and reading or writ-
ing the register using the CRTC Data register (3B5h or 3D5h). See the description of the I/O Address Select bit in the Mis-
cellaneous Output register (Section 6.6.17.1 on page 356) for more information on the I/O address of the CRTC registers.
The CRT timings are controlled by the CRT Controller registers when the VGA is active. Various third-party VGA adapters
implement these registers differently, and so different cards can produce different timings with the same settings. The set-
tings shown in Table 6-53 are recommended for various VGA modes when programming the CRTC registers.
Note: The Extended VGA Registers are accessed through the CRTC interface. This section only discusses the base VGA
registers, however. See Section 6.6.23 "VGA Block Extended Registers" on page 384 for more information on the
extended registers.
Table 6-53. CRTC Register Settings
VGA Mode
Index00010203040506070D0E0F10111213
0 2D2D5F5F2D2D5F5F2D5F5F5F5F5F5F
1 27274F4F27274F4F274F 4F4F4F4F4F
2 282850502828505028505050505050
3 909082829090828290828282828282
4 292951512929515129515151515151
5 8E8E9E9E8E8E9E9E8E9E9E9E9E9E9E
6 BFBFBFBFBFBFBFBFBFBFBFBF0B0BBF
7 1F1F1F1F1F1F1F1F1F1F1F1F3E3E1F
8 000000000000000000000000000000
9 4F4F4F4FC1C1C14FC0C04040 404041
A 0D0D0D0D0000000D00000000000000
B 0E0E0E0E0000000E00000000000000
C 000000000000000000000000000000
D 000000000000000000000000000000
E 000000000000000000000000000000
F 000000000000000000000000000000
10 9B 9B 9B 9B 9B 9B 9B 9B 9B 9B 83 83 E9 E9 9B
11 8D 8D 8D 8D 8D 8D 8D 8D 8D 8D 85 85 8B 8B 8D
12 8F 8F 8F 8F 8F 8F 8F 8F 8F 8F 5D 5D DF DF 8F
13 14 14 28 28 14 14 28 28 14 28 28 28 28 28 28
14 1F 1F 1F 1F 00 00 00 0F 00 00 0F 0F 00 00 40
15 97 97 97 97 97 97 97 97 97 97 65 65 E7 E7 98
16 B9 B9 B9 B9 B9 B9 B9 B9 B9 B9 B9 B9 04 04 B9
17 A3 A3 A3 A3 A2 A2 C2 A3 E3 E3 E3 E3 C3 E3 A3
18 FF FF FF FF FF FF FF FF FF FF FF FF FF FF FF