AMD Geodeā„¢ LX Processors Data Book 357
Display Controller Register Descriptions 33234H
6.6.17.2 VGA Input Status Register 0
6.6.17.3 VGA Input Status Register 1
6.6.17.4 VGA Feature Control
Read Address 3C2h
Write Address --
Type R/W
Reset Value 00h
VGA Input Status Register 0 Bit Descriptions
Bit Name Description
7 RSVD Not Implemented. (CRTC Interrupt Pending)
6:5 RSVD Reserved.
4 RSVD Not Implemented. (Display Sense)
3:0 RSVD Reserved.
Read Address 3BAh or 3DAh
Write Address --
Type R/W
Reset Value 01h
VGA Input Status Register 1 Bit Descriptions
Bit Name Description
7:4 RSVD Reserved.
3 VSYNC Vertical SYNC. When a 1, indicates that the VSYNC signal is active.
2:1 RSVD Reserved.
0DISP_EN Display Enable. Reads as a 0 when both horizontal and vertical display enable are
active. Reads as a 1 when either display enable signal is inactive.
Read Address 3CAh
Write Address 3BAh or 3DAh
Type R/W
Reset Value xxh
VGA Feature Control Register Bit Descriptions
Bit Name Description
7:0 RSVD Reserved.