168 AMD Geodeā„¢ LX Processors Data Book
CPU Core Register Descriptions
33234H
5.5.2.72 Region Configuration DMM MSR (RCONF_DMM_MSR)
MSR Address 0000180Fh
Type R/W
Reset Value 00000001_00000001h
Warm Start Value xxxxx001_xxxxx005h
RCONF_DMM_MSR Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
DMMTOP RSVD RPDMM
313029282726252423222120191817161514131211109876543210
DMMBASE RSVD
RPDMM_EN
DMM_NORM
RCONF_DMM_MSR Register Bit Descriptions
Bit Name Description
63:44 DMMTOP Top of DMM. Top of DMM region, 4 KB granularity inclusive.
43:40 RSVD Reserved.
39:32 RPDMM Region Properties in DMM Region when DMM Active.
31:12 DMMBASE Start of DMM. Start of DMM region, 4 KB granularity inclusive.
11:9 RSVD Reserved.
8 RPDMM_EN DMM Properties Region Enable.
0: Disable.
1: Enable.
7:0 DMM_NORM Region Properties in DMM Region when DMM Inactive.
Note: Region Properties: Bits [7:6] = RSVD; Bit 5 = WS; Bit 4 = WC; Bit 3 = WT; Bit 2 = WP; Bit 1 = WA; Bit 0 = CD.
See "Region Properties" on page 170 for further details.