AMD Geode™ LX Processors Data Book 635
Instruction Set 33234H
BTS Test Bit and Set --------x b h
Register/Memory, Immediate 0F BA [mod 101 r/m] # 2 2
Register, Register 0F AB [mod reg r/m] 2 2
Memory, Register 0F AB [mod reg r/m] 8 8
CALL Subroutine Call --------- b h,j,k,r
Direct Within Segment E8 +++ 2 2
Register/Memory Indirect Within Segment FF [mod 010 r/m] 2/4 2/4
Direct Intersegment
-Call Gate
-Task Switch
711
24+
123+
Indirect Intersegment
-Call Gate
-Task Switch
FF [mod 011 r/m] 9 13
25+
124+
CBW Convert Byte to Word 98 1 1 ---------
CDQ Convert Doubleword to Quadword 99 1 1 ---------
CLC Clear Carry Flag F8 1 1 --------0
CLD Clear Direction Flag FC 2 2 -0-------
CLFLUSH 7+ 7+
CLI Clear Interrupt Flag FA 1 1 --0------ m
CLTS Clear Task Switched Flag 0F 06 3 3 --------- c l
CMC Complement the Carry Flag F5 2 2 --------x
CMOVA/CMOVNBE Move if Above/Not Below or Equal 1 1 --------- r
Register, Register/Memory 0F 47 [mod reg r/m]
CMOVBE/CMOVNA Move if Below or Equal/Not Above 1 1 --------- r
Register, Register/Memory 0F 46 [mod reg r/m]
CMOVAE/CMOVNB/CMOVNC Move if Above or Equal/Not Below/Not Carry 1 1 --------- r
Register, Register/Memory 0F 43 [mod reg r/m]
CMOVB/CMOVC/CMOVNAE Move if Below/Carry/Not Above or Equal 1 1 --------- r
Register, Register/Memory 0F 42 [mod reg r/m]
CMOVE/CMOVZ Move if Equal/Zero 1 1 --------- r
Register, Register/Memory 0F 44 [mod reg r/m]
CMOVNE/CMOVNZ Move if Not Equal/Not Zero 1 1 --------- r
Register, Register/Memory 0F 45 [mod reg r/m]
CMOVG/CMOVNLE Move if Greater/Not Less or Equal 1 1 --------- r
Register, Register/Memory 0F 4F [mod reg r/m]
CMOVLE/CMOVNG Move if Less or Equal/Not Greater 1 1 --------- r
Register, Register/Memory 0F 4E [mod reg r/m]
CMOVL/CMOVNGE Move if Less/Not Greater or Equal 1 1 --------- r
Register, Register/Memory 0F 4C [mod reg r/m]
CMOVGE/CMOVNL Move if Greater or Equal/Not Less 1 1 --------- r
Register, Register/Memory 0F 4D [mod reg r/m]
CMOVO Move if Overflow 1 1 --------- r
Register, Register/Memory 0F 40 [mod reg r/m]
CMOVNO Move if No Overflow 0F 41 [mod reg r/m] 1 1 --------- r
Register, Register/Memory
CMOVP/CMOVPE Move if Parity/Parity Even 0F 4A [mod reg r/m] 1 1 --------- r
Register, Register/Memory
CMOVNP/CMOVPO Move if Not Parity/Parity Odd 0F 4B [mod reg r/m] 1 1 --------- r
Register, Register/Memory
CMOVS Move if Sign 0F 48 [mod reg r/m] 1 1 --------- r
Register, Register/Memory
Table 8-26. Processor Core Instruction Set (Continued)
Instruction Opcode
Clock Count
(Reg/Cache Hit) Flags Notes
Real
Mode
Prot’d
Mode ODI TSZ AP C
FFFFFFFFF
Real
Mode
Prot’d
Mode