226 AMD Geodeā„¢ LX Processors Data Book
GeodeLinkā„¢ Memory Controller Register Descriptions
33234H
6.2.2.7 Row Addresses Bank4 DIMM1, Bank5 DIMM1 (MC_CF_BANKCD)
6.2.2.8 Row Addresses Bank6 DIMM1, Bank7 DIMM1 (MC_CF_BANKEF)
MSR Address 20000016h
Type RO
Reset Value xxxxxxxx_xxxxxxxxh
MC_CF_BANKCD Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD MC_CF_BANKD
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
RSVD MC_CF_BANKC
MC_CF_BANKCD Bit Descriptions
Bit Name Description
63:54 RSVD Reserved. Reads back as 0.
53:32 MC_CF_BANKD Memory Controller Configuration Bank C. Open row address (31:10) for Bank5,
DIMM1.
31:22 RSVD Reserved. Reads back as 0.
21:0 MC_CF_BANKC Memory Controller Configuration Bank B. Open row address (31:10) for Bank4,
DIMM1.
MSR Address 20000017
Type RO
Reset Value xxxxxxxx_xxxxxxxxh
MC_CF_BANKEF Register Map
63 62 61 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 43 42 41 40 39 38 37 36 35 34 33 32
RSVD MC_CF_BANKF
313029282726252423222120191817161514131211109876543210
RSVD MC_CF_BANKE
MC_CF_BANKEF Bit Descriptions
Bit Name Description
63:54 RSVD Reserved. Reads back as 0.
53:32 MC_CF_BANKF Memory Controller Configuration Bank F. Open row address (31:10) for Bank7,
DIMM1.
31:22 RSVD Reserved. Reads back as 0.
21:0 MC_CF_BANKE Memory Controller Configuration Bank E. Open row address (31:10) for Bank6,
DIMM1.