478 AMD Geodeā„¢ LX Processors Data Book
Video Input Port
33234H
Figure 6-52. Example VIP YUV 4:2:0 Planar Buffer
(all base registers are 8-byte aligned)
U Buffer
V Buffer
line #1 Y values
Y pitch = task_A_vid_pitch
Y Buffer
task_A_UV_pitch
+ U_buffer_even_offset
+V_buffer_even_offset
line #1 U values
line #1 V values
vid_base
vid_base
vid_base
** Similar buffers can exist for Task A even video
Note: Line lengths, which are not divisible by 8, will result in an odd number of U and V data for each line.
When this occurs, the fill values used (for QWORD boundaries) may not be 00. This occurs
only if non-standard video formats are used. The non 00 data is not part of the line.
** Odd/even de-interlacing is not supported for Task B (Task B shares pointers between odd/even fields)
U pitch = task_A_U_pitch
V pitch = task_A_V_pitch