Field Name Bits Default Description
GPIO_Out 3:0 0h Write 1 to set and 0 to clear each of the GPIO port; providing
the corresponding enable bits (7:4) are set to 0
Bit[0] for GPIO49/FANOUT2
Bit[1] for GPIO50/FANIN0
Bit[2] for GPIO51/FANIN1
Bit[3] for GPIO52/FANIN2
GPIO_Out_En# 7:4 Fh GPIO output port enable for each of the GPIO port
0: Output = GPIO_Out
1: Output = tristate
GPIO_Status 11:8 - GPIO input status for each of the GPIO port
Reserved 15:12 0h
GPIO_52_to_49_Cntrl register
GPIO_56_to_53_Cntrl - RW – 16 bits - [PCI_Reg: 52h] Field Name Bits Default Description
GPIO_Out 3:0 0h Write 1 to set and 0 to clear each of the GPIO port; providing
the corresponding enable bits (7:4) are set to 0
Bit[0] for GPIO53/VIN0
Bit[1] for GPIO54/VIN1
Bit[2] for GPIO55/VIN2
Bit[3] for GPIO56/VIN3
GPIO_Out_En# 7:4 Fh GPIO output port enable for each of the GPIO port
0: Output = GPIO_Out
1: Output = tristate
GPIO_Status 11:8 - GPIO input status for each of the GPIO port
Reserved 15:12 0h
GPIO_56_to_53_Cntrl register
GPIO_60_to_57_Cntrl - RW – 16 bits - [PCI_Reg: 54h] Field Name Bits Default Description
GPIO_Out 3:0 0h Write 1 to set and 0 to clear each of the GPIO port providing
the corresponding enable bits (7:4) are set to 0
Bit[0] for GPIO57/VIN4
Bit[1] for GPIO58/VIN5
Bit[2] for GPIO59/VIN6
Bit[3] for GPIO60/VIN7
GPIO_Out_En# 7:4 Fh GPIO output port enable for each of the GPIO port
0: Output = GPIO_Out
1: Output = tristate
GPIO_Status 11:8 - GPIO input status for each of the GPIO port
Reserved 15:12 0h
GPIO_60_to_57_Cntrl register
GPIO_64_to_61_Cntrl - RW – 16 bits - [PCI_Reg: 56h] Field Name Bits Default Description
GPIO_Out 3:0 0h Write 1 to set and 0 to clear each of the GPIO port providing
the corresponding enable bits (7:4) are set to 0
Bit[0] for GPIO61/TEMPIN0
Bit[1] for GPIO62/TEMPIN1
Bit[2] for GPIO63/TEMPIN2
Bit[3] for GPIO64/TEMPIN3
GPIO_Out_En# 7:4 Fh GPIO output port enable for each of the GPIO port
0: Output = GPIO_Out
1: Output = tristate
GPIO_Status 11:8 - GPIO input status for each of the GPIO port
Reserved 15:12 0h