AMD SB600 - page 173

AMD SB600 Register Reference Manual Proprietary Page 173

ProgramIo5RangeHi - RW – 8 bits - [PM_Reg: A3h]

Field Name Bits Default Description

ProgramIo5RangeHi register

Programlo6RangeLo - RW – 8 bits - [PM_Reg: A4h]

Field Name Bits Default Description

ProgramIo6Mask 3:0 0h These four bits are used to mask the least 4 bits of the 16 bit

I/O. If bit [3] is set, then bit [3] of the I/O address is not

compared. If it is not set, then bit [3] of the monitored address

is 0. The same applies for the other three bits [2:0].

For example, if x15=80h, x14[7:4]=Ah, and x14[3:0]=3h, then

the monitored range is 80A4h : 80A0h (bit 0 and 1 are

masked)

ProgramIo6RangeLo 7:4 0h I/O range base address; these bits define the least significant

byte of the 16 bit I/O range base address that is programmed

to trigger SMI# when the address is accessed. Bit 7

corresponds to Addr[7] and bit 4 to Addr[4].

ProgramIo6RangeLo register

ProgramIo6RangeHi - RW – 8 bits - [PM_Reg: A5h]

Field Name Bits Default Description

ProgramIo6RangeHi 7:0 00h I/O range base address; these bits define the most significant

byte of the 16 bit I/O range base address. Bit 7 corresponds

to Addr[15] and bit 0 to Addr[8].

ProgramIo6RangeHi register

Programlo7RangeLo - RW – 8 bits - [PM_Reg: A6h]

Field Name Bits Default Description

ProgramIo7Mask 3:0 0h These four bits are used to mask the least 4 bits of the 16 bit

I/O. If bit [3] is set, then bit [3] of the I/O address is not

compared. If it is not set, then bit [3] of the monitored

address is 0. The same applies for the other three bits [2:0].

For example, if x15=80h, x14[7:4]=Ah, and x14[3:0]=3h, then

the monitored range is 80A4h : 80A0h (bit 0 and 1 are

masked)

ProgramIo7RangeLo 7:4 0h I/O range base address; these bits define the least significant

byte of the 16 bit I/O range base address that is programmed

to trigger SMI# when the address is accessed. Bit 7

corresponds to Addr[7] and bit 4 to Addr[4].

ProgramIo7RangeLo register

ProgramIo7RangeHi - RW – 8 bits - [PM_Reg: A7h]

Field Name Bits Default Description

ProgramIo7RangeHi 7:0 00h I/O range base address; these bits define the most significant

byte of the 16 bit I/O range base address. Bit 7 corresponds

to Addr[15] and bit 0 to Addr[8].

ProgramIo7RangeHi register

PIO7654Enable - RW – 8 bits - [PM_Reg: A8h]

Field Name Bits Default Description

ProgramIo4Enable 0 0b Enables IO monitoring for ProgramIO4 (defined by index A0,

A1).

1 = On

0 = Off