AMD SB600 - page 142

©2008 Advanced Micro Devices, Inc. SMBus Module and ACPI Block (Device 20, Function 0)
AMD SB600 Register Reference Manual Proprietary Page 142
MiscControl - RW – 8 bits - [PM_Reg: 00h]
Field Name Bits Default Description
Reserved 3 0b
SmiReq 4 0b Software initiated SMI#. When set, SB will update bit [4] of
the MiscStatus and issue SMI#.
Reserved 7:5 000b
MiscControl register
MiscStatus - RW – 8 bits - [PM_Reg: 01h]
Field Name Bits Default Description
SmiEvent 0 0b SB sets this bit to indicate an SMI# was issued due to events
specified by index 02, 03, 04, 1C, or A8h
Timer1Exp 1 0b SB sets this bit to indicate that PM_TIMER1 has expired.
Timer2Exp 2 0b SB sets this bit to indicate that PM_TIMER2 has expired.
Reserved 3 0b
SmiReq 4 0b SB sets this bit to indicate the software initiated SMI# was
issued.
Reserved 6:5 00b
StatusRst 7 0b Writing a 1 to this location will reset PM status registers 05h,
06h, and 07h, 1Dh, and A9h. This mechanism provides a
quick way to reset all status.
MiscStatus register
SmiWakeUpEventEnable1 - RW – 8 bits - [PM_Reg: 02h]
Field Name Bits Default Description
SmiWakeUpEventEnable1 7:0 00h Enable SMI# on IRQ[15:8] activity.
SmiWakeUpEventEnable1 register.
SmiWakeUpEventEnable2 - RW – 8 bits - [PM_Reg: 03h]
Field Name Bits Default Description
SmiWakeUpEventEnable2 7:0 00h Enables SMI# on {IRQ[7:3], NMI, IRQ[1:0]} activity.
SmiWakeUpEventEnable2 register.
SmiWakeUpEventEnable3 - RW – 8 bits - [PM_Reg: 04h]
Field Name Bits Default Description
ExtEvent0 0 0b Enables SMI# on external event input 0
ExtEvent1 1 0b Enables SMI# on external event input 1
GAME_SMI_EN 2 0b Enables SMI# on game port activity (201h)
FDD_SMI_EN 3 0b Enables SMI# on floppy drive activity
HDD_SMI_EN 4 0b Enables SMI# on IDE device activity (201h)
COM_SMI_EN 5 0b Enables SMI# on serial ports activity (201h)
LPT_SMI_EN 6 0b Enables SMI# on parallel port activity (201h)
SLP_SMI_EN 7 0b Enables SMI# on sleep command
SmiWakeUpEventEnable3 register.
SmiWakeUpEventStatus1 - RW – 8 bits - [PM_Reg: 05h]
Field Name Bits Default Description
SmiWakeUpEventStatus1 7:0 00h Set to 1 to identify IRQ[15:8] activity as source of SMI#.
SmiWakeUpEventStatus1 register.
SmiWakeUpEventStatus2 - RW – 8 bits - [PM_Reg: 06h]
Field Name Bits Default Description
SmiWakeUpEventStatus2 7:0 00h Set to 1 to identify IRQ[7:0] activity as source of SMI#.