AMD SB600 , List of Tables

AMD SB600 Register Reference Manual Proprietary Page 6

List of Tables

Table 1-1: Register Description Table Notation—Example............................................................................................7

Table 2-1 HcRevision Register ....................................................................................................................................68

Table 2-2 Legacy Support Registers............................................................................................................................68

Table 2-3 Emulated Registers......................................................................................................................................68

Table 2-4 HceInput Registers ......................................................................................................................................69

Table 2-5 HceOutput Register .....................................................................................................................................69

Table 2-6 HceStatus Register......................................................................................................................................69

Table 2-7 HceControl Register.....................................................................................................................................70

Table 2-8 IDE Device Registers Mapping.................................................................................................................. 196

Table 3-1 PCI-to-PCI Bridge Configuration Registers Summary................................................................................265

Table 4-1: GPIO Pins.................................................................................................................................................277

Table 4-2: GPOC Pins ...............................................................................................................................................282

Table 4-3: GPE Pins.................................................................................................................................................. 283

Table 4-4: ExtEvent Pins as GPIO.............................................................................................................................287

Table 4-5: ExtEvent Pins to Generate SMI# ..............................................................................................................287

Table 4-6: THRMTRIP Pin......................................................................................................................................... 288

Table 4-7: TALERT# through GPE ............................................................................................................................288

Table 4-8: TALERT# to generate SMI#......................................................................................................................288