![](/images/new-backgrounds/1187796/18779679x1.webp)
Figure 12. Memory Socket Locations
Memory channels are organized as follows:
Processor 1 | channel 1: memory sockets A1 and A4 |
| channel 2: memory sockets A2 and A5 |
| channel 3: memory sockets A3 and A6 |
Processor 2 | channel 1: memory sockets B1 and B4 |
| channel 2: memory sockets B2 and B5 |
| channel 3: memory sockets B3 and B6 |
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