•64 Byte - Hit

This is the fraction of 64-byte data snoops that hit a cache line, out of all data snoops (64-byte and 128-byte).

•64 Byte - Hitm

This is the fraction of 64-byte data snoops that hit a modified cache line, out of all data snoops (64-byte and 128-byte).

•64 Byte - Impwb

This is the fraction of 64-byte data snoops that are due to implicit write backs, out of all data snoops (64-byte and 128-byte).

•Inv Snoop - Hitm

This is the fraction of invalid snoops that hit a modified cache line, out of all invalid snoops (64-byte and 128-byte).

•Inv Snoop - Impwb

This is the fraction of invalid snoops that are due to implicit write backs, out of all invalid snoops (64-byte and 128-byte).

•Inv Snoop - 64B

This is the fraction of invalid snoops that are 64-byte snoops, out of all invalid snoops (64-byte and 128-byte).

replay Event Set

Available only on Intel® Itanium® 9500 processor systems.

The replay event set provides information about CPU cycles lost due to instruction replays, breaking them down into the different types of replays.

Metrics Available from this Measurement

The following metrics are available from this event set. These descriptions do not take into account any command-line options you might use.

The metrics are:

•Cycles

The number of clock cycles (CPU_OP_CYCLES.ALL). (NOTE : If necessary the user can calculate the exact number of various replay cycles using this value).

•FET

Percentage of cycles spent in replay in the Fetch stage of the frontend part of the pipeline.

•IBD

Percentage of cycles spent in replay in the Instruction buffer & dispersal stage.

•EXE

Percentage of cycles spent in replay in the Instruction execute stage.

•DET

Percentage of cycles spent in replay in the Detect Exception stage.

•WB2

Percentage of cycles spent in replay in the Writeback2 stage.

stall Event Set

The stall event set provides information on primary CPU performance limiters by breaking the CPI into seven components.

replay Event Set 259