If you use this event set, the default is to make the measurements irrespective of CPU operating state (that is, user, system, or interrupt states). By default, the idle state is not included in the measurement. You can use
•Limit measurement to a specific privilege level:
•Include idle:
•Exclude the interruption state:
•Only measure the interruption state:
The metrics available from this event set are described in the following sections. These descriptions do not take into account any
Metrics Available for Intel Itanium 2 and dual core Itanium 2 processor systems
The metrics are:
•Raw CPI
The raw CPI is computed using all instructions retired. This includes nops and predicated off instructions. The relationship between effective and raw CPI values can be obtained from the cpi measurement.
•Itlb
This counts the number of cycles where there are no
•Icache
This counts the number of cycles where there are no
•Branch
This counts the number of stall cycles associated with branch execution. There are two components to this category. The first is stalls due to execution bubbles caused by a
•Unstall Execute
This is the percentage of cycles when the backend is executing instructions without stalling. Depending on code characteristics and resource limitations, the number of instructions executing varies from 1 to 6, which is the maximum dispatch for the Itanium 2 processor. Taken branches,
•BE Flush
This counts the number of stall cycles resulting from a pipeline flush caused by a branch misprediction, an exception, an ALAT flush, or a serialization flush.
•Scoreboard
This counts stall cycles due to dependencies on integer or
•L1Dtlb
This counts the number of cycles stalled due to a level 1 data TLB miss that hits in the level 2 data TLB. This is sometimes called a L1DTLB transfer stall. If the level 2 TLB misses, the hardware
260 Event Set Descriptions for CPU Metrics