The metrics are:

•Read Rate

Number of memory read requests per second.

•Live Reads

This is the average number of outstanding reads per cycle. This gives some idea about the memory request density.

•Ave Latency - Cycle

Average system memory read latency in CPU cycles.

•Ave Latency - Nsec

Average system memory read latency in nanoseconds.

•Pftch

This is total number of cacheable instruction prefetch memory requests per 1000 retired instructions, including nops and predicated off instructions.

•Dmnd

This is total number of cacheable instruction demand fetch memory requests per 1000 retired instructions, including nops and predicated off instructions.

•Load

This is total number of cacheable loads per 1000 retired instructions, including nops and predicated off instructions.

•Store

This is total number of cacheable RFO (Read For Ownership) stores per 1000 retired instructions, including nops and predicated off instructions.

•Hint

This is total number of cacheable RFO (Read For Ownership) hints per 1000 retired instructions, including nops and predicated off instructions.

•WB - 128

This is total number of cacheable 128-byte write backs per 1000 retired instructions, including nops and predicated off instructions.

•WB - 64

This is total number of cacheable 64-byte write backs per 1000 retired instructions, including nops and predicated off instructions.

•Instr

This is total number of uncacheable instruction (prefetch and demand) fetches per 1000 retired instructions, including nops and predicated off instructions.

•Load

This is total number of uncacheable loads per 1000 retired instructions, including nops and predicated off instructions.

•Store

This is total number of uncacheable stores (write backs) per 1000 retired instructions, including nops and predicated off instructions.

queues Event Set

Available only on Itanium 2 and dual-core Itanium 2 systems.

256 Event Set Descriptions for CPU Metrics